Flash Memory Controller Fast Page Programming

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Solution Overview

Problem

Flash memory devices face a trade-off between data programming speed and storage capacity, as using only fast programming pages improves speed but reduces capacity, while using all pages reduces efficiency.

Innovation Solution

A data programming method that groups physical blocks into a data area and a spare area, dynamically determining a logical address range to use only fast physical addresses for programming when possible, thereby increasing speed without reducing storage capacity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If only pages with relatively fast programming speed are used, then data programming speed is improved, but applicable capacity of the flash memory is greatly reduced

Engineering Contradiction:
Improvedata programming speedVSAvoidapplicable capacity
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The flash memory pages are segmented into three categories: fast pages, slow pages, and invalid pages. The controller identifies and separates these page types, allowing selective use of fast pages for new data programming while preserving slow pages for other purposes, thus resolving the contradiction between speed and capacity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system changes the parameter of page selection by dynamically identifying fast versus slow pages based on programming speed characteristics. By adjusting which pages are selected for programming operations based on their speed parameters, the system achieves both high speed and full capacity utilization

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If all pages are used to maximize storage capacity, then applicable capacity is improved, but data programming speed is reduced

Engineering Contradiction:
Improveapplicable capacityVSAvoiddata programming speed
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The flash memory pages are segmented into three categories: fast pages, slow pages, and invalid pages. The controller identifies and separates these page types, allowing selective use of fast pages for new data programming while preserving slow pages for other purposes, thus resolving the contradiction between speed and capacity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different quality treatment is applied to different pages: fast pages are used for new data programming, slow pages are used for overwriting invalid data, and invalid pages are reserved for recovery. This local differentiation of page quality and usage optimizes both speed and capacity

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8706952B2Flash memory storage device, controller thereof, and data programming method thereof
Publication Date: 2014.04.22 PHISON ELECTRONICS
  • US8706952B2 patent drawing
  • US8706952B2 patent drawing
  • US8706952B2 patent drawing

AI summary

A flash memory storage device, a controller thereof, and a data programming method are provided. The flash memory storage device has a flash memory comprising a plurality of physical blocks, each physical block includes a plurality of physical addresses, and the physical addresses comprises at least one fast physical address and at least one slow physical address. The method comprises at least grouping the physical blocks into a data area and a spare area; setting a predetermined block number; obtaining m physical blocks from the spare area, receiving a write command comprising a write data and a logical address, determining a logical address range of a buffer according to the logical address and the predetermined block number. When all logical addresses to be programmed with the write data are within the logical address range of the buffer, using a fast mode to program the data into the m physical blocks.