Flash Memory Controller Dynamic FEC Adaptation
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Solution Overview
Problem
The reliability and lifespan of NAND flash memory are compromised due to increased susceptibility to bit errors and limited write cycles, leading to premature degradation and reduced storage capacity, as existing flash controllers use fixed FEC parameters that mark corrupted pages as bad, reducing storage capacity without effectively utilizing remaining data.
Innovation Solution
Implement a dynamic FEC parameter selector that adjusts the redundancy level based on page error rates, mapping multiple corrupted pages to a single logical page with expected size, using a new FEC parameter set that provides more error correction capability, thereby extending the lifespan and maintaining interface consistency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fixed FEC parameters are used and corrupted pages are marked as bad, then write reliability is improved, but storage capacity is reduced
Solution Approach 1:
The patent implements dynamic FEC parameter selection that adapts to the actual error rate conditions of each page. Instead of using fixed FEC parameters for all pages, the system selects appropriate FEC parameter sets based on measured error rates, allowing flexible adjustment between reliability and storage capacity. This dynamic approach resolves the contradiction by enabling the system to maintain high reliability only where needed while preserving storage capacity elsewhere.
Solution Approach 2:
The patent changes the FEC parameters (such as code rate, block length) based on the error rate characteristics of each page. By adjusting these parameters dynamically, the system can provide stronger error correction for pages with high error rates while using weaker correction for pages with low error rates, thus resolving the contradiction between reliability and storage capacity utilization.
2Reliability
If more redundancy is added to corrupted pages, then error correction capability is improved, but usable storage space is reduced
Solution Approach 1:
The patent applies different levels of redundancy (FEC parameter sets) to different pages based on their local error rate characteristics. Pages with high error rates receive stronger error correction with more redundancy, while pages with low error rates use weaker correction with less redundancy. This local differentiation resolves the contradiction by optimizing the reliability-storage tradeoff for each page individually rather than applying a uniform approach.
Solution Approach 2:
The system dynamically changes FEC parameters including code rate and block length based on measured error rates. When error rates are high, parameters are adjusted to provide stronger correction capability. When error rates are low, parameters are adjusted to minimize redundancy overhead. This parameter adaptation resolves the contradiction between error correction capability and usable storage space.
3Quantity of substance
If multiple corrupted pages are mapped to a single logical page, then storage capacity is maintained, but interface complexity increases
Solution Approach 1:
The patent introduces a mapping layer that acts as an intermediary between the physical corrupted pages and the logical page interface. This mapping mechanism consolidates multiple physical pages (including corrupted ones) into a single logical page, maintaining the simple page-based interface while handling the complexity of corrupted page management internally. The intermediary mapping layer resolves the contradiction by shielding the interface from complexity while preserving storage capacity.
Solution Approach 2:
The patent segments the logical page into multiple physical page portions, allowing different segments to be stored in different physical pages with varying error rates. This segmentation enables the system to maintain a simple logical interface while internally managing multiple corrupted pages, resolving the contradiction between storage capacity maintenance and interface complexity.
Data Source
AI summary
A method for controlling flash memory includes selecting a new forward error correction (FEC) parameter set that provides more redundancy than a current FEC parameter set. The method also includes coding source information bits, using the new FEC parameter set, during write operations to a first corrupted page in the flash memory. The method further includes mapping the first corrupted page and at least one additional corrupted page in the flash memory to a single logical page with an expected page size.