2-Transistor Flash Memory Floating Control Gate
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Solution Overview
Problem
Current 2-transistor flash memory technologies face challenges in programming efficiency due to program disturbances such as Fowler-Nordheim tunneling and hot electron injection, which affect the reliability of memory cells, especially when programming unselected cells.
Innovation Solution
The proposed solution involves a 2-transistor flash memory design where the control gate of unselected memory cells on different rows is floated during programming, using specific voltage configurations to prevent program disturbances by isolating unselected cells from programming voltages, thereby enhancing memory cell reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If programming voltages are applied to selected memory cells, then programming efficiency is improved, but program disturbances occur in unselected memory cells affecting reliability
Solution Approach 1:
The memory array is segmented into selected and unselected regions through the use of byte selection transistors and control logic. The control gate of unselected memory cells is separated from the programming voltage by being connected to a floating node, effectively segmenting the voltage application path and preventing program disturbances in unselected cells while maintaining efficient programming of selected cells
Solution Approach 2:
A floating control gate node is introduced as an intermediary between the programming voltage source and unselected memory cells. This floating node acts as a voltage barrier that blocks the propagation of programming voltages to unselected cells, thereby preventing Fowler-Nordheim tunneling and hot electron injection disturbances while allowing efficient programming of selected cells
2Reliability
If control gate of unselected memory cells is floated, then program disturbances are prevented, but voltage configuration complexity increases
Solution Approach 1:
The byte selection transistor serves multiple functions: it selects byte lanes for programming and simultaneously controls the floating of unselected control gates. This multi-functionality reduces the need for separate circuitry to manage control gate voltages, thereby preventing program disturbances without proportionally increasing device complexity
Solution Approach 2:
The control gate voltage of unselected memory cells is changed from a fixed voltage level to a floating state (high impedance). This parameter change effectively blocks program disturbances by preventing voltage coupling to unselected cells, while the change is managed through existing transistor control mechanisms rather than adding complex voltage generation circuitry
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents program disturbances like FN tunneling and hot electron injection, improving the reliability of the 2-transistor flash memory by ensuring accurate programming of selected cells without affecting unselected cells, thus enhancing overall memory performance.
Implementation Method 1
a charge pump configured to generate a high voltage
Implementation Method 2
program disturbances such as Fowler-Nordheim tunneling and hot electron injection
Implementation Method 3
program disturbances such as Fowler-Nordheim tunneling and hot electron injection
Data Source
AI summary
Disclosed is a 2-transistor flash memory that includes a memory cell array, a row driver, a read/write circuit, a charge pump generating a high voltage, and control logic configured to transfer the high voltage to the row driver, the read/write circuit, and the memory cell array. If programming, the row driver and the read/write circuit apply voltages such that a control gate of a cell transistor in an unselected memory cell on a different row from a selected memory cell is floated.