Flash Memory Floating Gate Edge Configuration for ONO Residue Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing manufacturing processes for semiconductor devices, particularly flash memory, face challenges with etching residues of the ONO film causing electric short-circuits between adjacent floating gates, leading to reduced yield and increased manufacturing costs due to the need for additional processing steps to form insulating side walls before depositing the ONO film.
Innovation Solution
A semiconductor device design where the intermediate insulating film residues extend linearly over device isolation or tunnel insulating films between control gates, with the edge of the conductive pattern or device isolation film bent to prevent residues from forming on slanting surfaces, thereby avoiding electrical short-circuits and reducing manufacturing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If insulating side walls are formed before depositing the ONO film, then etching residues of ONO film are eliminated, but the number of manufacturing processes increases
Solution Approach 1:
The patent applies preliminary action by forming the intermediate insulating film with a specific bent edge configuration before depositing the ONO film. This preliminary structural preparation ensures that the ONO film is automatically removed from slanting surfaces during subsequent etching processes, eliminating the need to form insulating side walls beforehand while still preventing etching residues
2Reliability
If insulating side walls are formed before depositing the ONO film, then etching residues of ONO film are eliminated, but manufacturing cost increases
Solution Approach 1:
The patent applies preliminary action by forming the intermediate insulating film with a specific bent edge configuration before depositing the ONO film. This preliminary structural preparation ensures that the ONO film is automatically removed from slanting surfaces during subsequent etching processes, eliminating the need to form insulating side walls beforehand while still preventing etching residues
3Reliability
If the edge of conductive pattern or device isolation film is bent, then residues are prevented from forming on slanting surfaces, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies preliminary action by forming the intermediate insulating film with a specific bent edge configuration before depositing the ONO film. This preliminary structural preparation ensures that the ONO film is automatically removed from slanting surfaces during subsequent etching processes, eliminating the need to form insulating side walls beforehand while still preventing etching residues
Solution Approach 2:
The patent changes the geometric parameter of the intermediate insulating film by introducing a bent edge configuration instead of a straight edge. This parameter change creates slanting surfaces that cause the ONO film to be automatically removed during etching, preventing residue formation while maintaining manufacturing feasibility
Data Source
AI summary
A method for manufacturing a semiconductor device is provided. The method includes forming multiple conductive patterns 13a, forming an intermediate insulating film 16 on all of device isolation insulating films 6 and the conductive patterns 13a, forming a second conductive film 17 on the intermediate insulating film 16, patterning the second conductive film 17, the intermediate insulating film 16, and the multiple conductive patterns 13a, individually, to make the conductive patterns 13a into floating gates 13c and to make the second conductive film 17 into multiple strip-like control gates 17a. In the method, an edge, in a plan layout, of at least one of each of the conductive patterns 13a and each of the device isolation insulating films 6 is bent in a region between the control gates 17a adjacent in a row direction.