Flash Memory Sidewall Oxide Fluorine Plasma Treatment

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Solution Overview

Problem

As semiconductor flash memory devices become increasingly integrated, the electron trap phenomenon at the interface region of the sidewall oxide layer during the formation of the sidewall oxide layer leads to deteriorated data retention characteristics.

Innovation Solution

A fluorine plasma ion implantation process is performed on the sidewall oxide layer to stabilize trap points, reducing or eliminating electron traps and improving data retention by infiltrating fluorine radicals into the interface region.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a sidewall oxide layer is formed on the gate electrode to protect the floating gate, then the gate structure is protected and defined, but electron traps are generated at the interface region causing deteriorated data retention

Engineering Contradiction:
Improvedata retentionVSAvoidelectron traps at interface
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies fluorine plasma treatment to convert the harmful electron traps at the sidewall oxide layer interface into beneficial stabilized trap points. The fluorine plasma infiltrates the interface region and passivates the dangling bonds that cause electron traps, thereby converting the harmful interface defects into a stable, non-trapping interface structure.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent changes the chemical and physical parameters of the sidewall oxide layer interface by exposing it to fluorine plasma. This treatment modifies the interface composition and structure, reducing the density of electron traps and stabilizing the interface region to prevent further trap formation during subsequent annealing processes.

Inventive Principle:
Principle #35Parameter changes

2Stability of the object's composition

If the floating gate and control gate are covered with gate insulating layer and sidewall oxide layer to improve data retention, then gate structure stability is improved, but interface damage during sidewall oxide formation creates electron traps

Engineering Contradiction:
Improvegate structure stabilityVSAvoidinterface quality
Core Design Contradiction:
Stability of the object's compositionVSManufacturing precision

Solution Approach 1:

The patent applies fluorine plasma treatment immediately after sidewall oxide layer formation to prevent interface damage effects. This preliminary action stabilizes the interface region before subsequent processing steps, preventing electron trap formation that would otherwise occur during annealing or device operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The fluorine plasma acts as an intermediary treatment between sidewall oxide formation and final device operation. It mediates the interface quality by passivating dangling bonds and stabilizing the interface structure, thereby preventing the transmission of interface defects into electron traps that would affect data retention.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The fluorine plasma ion implantation process effectively reduces electron traps at the sidewall oxide layer interface, enhancing data retention in flash memory devices by fixing the interface region and preventing further trap formation during annealing.

Implementation Method 1

a fluorine plasma process to stably fix trap points at the interface of the sidewall oxide layer

Methodology Applied
Scientific EffectPlasma: Plasma

Implementation Method 2

a fluorine plasma ion implantation process is performed on the sidewall oxide layer

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS7553721B2Flash memory devices and methods of fabricating the same
Publication Date: 2009.06.30 MARVELL ASIA PTE LTD
  • US7553721B2 patent drawing
  • US7553721B2 patent drawing
  • US7553721B2 patent drawing

AI summary

Flash memory devices and methods for fabricating the same. In one example embodiment, a method of fabricating a flash memory includes various acts. First, a tunnel oxide layer is formed on an active region of a semiconductor substrate. Next, a gate region is formed by sequentially forming a floating gate, a gate insulating layer, and a control gate over the tunnel oxide layer. Then, a sidewall oxide layer is formed on a gate region. Next, a fluorine plasma ion implantation process is performed on the sidewall oxide layer. Then, a nitride layer is deposited on the sidewall oxide layer. Next, an etch process is performed to form spacer insulating layers.