Flash Memory Forcing Bits Maintain Constant ECC

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Solution Overview

Problem

Soft errors in integrated circuits, particularly in flash memory, are caused by alpha particles, cosmic rays, and manufacturing defects, leading to increased failure rates and performance issues due to the need for frequent block erasures and rewritings, which are time-consuming and inefficient.

Innovation Solution

The introduction of forcing bits in a data field to maintain a constant Error Correction Code (ECC) value, reducing the frequency of block erasures by strategically positioning or appending these bits within data bytes, allowing for more efficient programming and error correction in flash memory.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If block erasure and rewriting operations are performed frequently to correct soft errors, then error correction capability is improved, but writing performance deteriorates due to time-consuming erasure operations

Engineering Contradiction:
Improveerror correction capabilityVSAvoidwriting performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent pre-calculates and stores forcing bit values in a lookup table before actual programming operations. When programming data, the system retrieves pre-computed forcing bits from the table rather than calculating them in real-time, significantly reducing the time required for programming operations while maintaining constant ECC values.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent performs block erasure operations only when absolutely necessary (when data must be changed from 0 to 1), rather than frequently erasing and rewriting blocks for minor corrections. This preliminary assessment of whether erasure is truly needed reduces the frequency of time-consuming erasure operations.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If forcing bits are added to maintain constant ECC values, then block erasure frequency is reduced, but device complexity increases due to additional bits and lookup tables

Engineering Contradiction:
Improveblock erasure frequencyVSAvoidstructure complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent changes the parameter of ECC by introducing forcing bits that modify the ECC calculation to produce constant values. This parameter change allows the system to maintain constant ECC values across different data states, thereby reducing the frequency of block erasures needed to correct soft errors.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent creates a lookup table that stores pre-computed forcing bit values. This table acts as a copy of necessary correction data that can be quickly retrieved during programming operations, avoiding the need for complex real-time calculations and simplifying the programming process.

Inventive Principle:
Principle #26Copying

3Device complexity

If entire blocks are erased and rewritten at once, then error correction is simplified, but time consumption increases compared to byte-level operations

Engineering Contradiction:
Improveerror correction complexityVSAvoidtime consumption
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The patent segments the block erasure operation by introducing forcing bits that allow selective correction at the byte or word level without requiring complete block erasure. This segmentation enables the system to perform corrections more granularly, reducing the time consumption associated with erasing and rewriting entire blocks.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent pre-calculates forcing bit values and stores them in lookup tables, so that during actual programming operations, the system can quickly retrieve and apply the necessary correction bits without performing time-consuming calculations or full block erasures.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8225177B2Progressively programming flash memory while maintaining constant error correction codes
Publication Date: 2012.07.17 TEXAS INSTRUMENTS INC
  • US8225177B2 patent drawing
  • US8225177B2 patent drawing
  • US8225177B2 patent drawing

AI summary

In an embodiment, the invention provides a method for programming flash memory while maintaining a constant error correction term. A data field and forcing bits are arranged in a packing order. Next, all the forcing bits are set to a logical zero value. A first error correction term is generated using the data field and forcing bits as an input to an ECC encoding algorithm. An exclusive OR function is performed on the constant error correction term and the first error correction term creating a difference term. A forcing function is applied to the difference term creating a new value for the forcing bits. The data field and the forcing bits are written to the flash memory.