Multi-bit Flash Memory Programming via Group Segmentation

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Solution Overview

Problem

Existing multi-bit flash memory devices require a large number of latches in the page buffer and increased time for programming due to the need for simultaneous programming of multiple threshold voltage states, which complicates the programming process and increases chip size.

Innovation Solution

The method involves dividing memory cells into groups based on threshold voltage states, allowing for programming by group unit, reducing the number of latches needed in the page buffer and optimizing the programming process by applying different program start voltages and read voltages to each group, thereby reducing the time required for programming.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory cells are programmed simultaneously by page unit according to binary ordering method, then multi bit data can be stored in one memory cell, but the number of latches in page buffer increases and programming time increases

Engineering Contradiction:
Improvedata storage capacityVSAvoidnumber of latches in page buffer
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent divides memory cells into multiple groups based on their threshold voltage states (e.g., first group for states 0 and 1, second group for states 2 and 3). This segmentation allows different groups to be programmed independently with different program start voltages, reducing the number of latches needed in the page buffer from 4 bits to 2 bits, while still enabling multi-bit data storage in each memory cell.

Inventive Principle:
Principle #1Segmentation

2Reliability

If memory cells are programmed simultaneously by page unit, then programming completeness is achieved, but programming time increases

Engineering Contradiction:
Improveprogramming completenessVSAvoidprogramming time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the programming process into multiple iterations, where in each iteration only a subset of memory cells (one group) is programmed. This allows the programming operation to be completed more quickly per iteration, and through multiple iterations all memory cells are eventually programmed, maintaining completeness while reducing total programming time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs periodic programming iterations where different groups of memory cells are programmed in alternating cycles. In each iteration, a preliminary read operation identifies which group needs programming, followed by program execution and verify operations. This periodic approach ensures all cells are programmed correctly while minimizing overall programming time.

Inventive Principle:
Principle #19Periodic action

3Manufacturing precision

If different program start voltages are applied to different groups, then programming precision is improved, but device complexity increases

Engineering Contradiction:
Improveprogramming precisionVSAvoidcontrol logic complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies different program start voltages to different groups of memory cells based on their specific threshold voltage states. The first group receives a first program start voltage while the second group receives a second program start voltage. This local differentiation improves programming precision for each group while the control logic complexity is managed through systematic group management.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS7920420B2Multi bit flash memory device and method of programming the same
Publication Date: 2011.04.05 SAMSUNG ELECTRONICS CO LTD
  • US7920420B2 patent drawing
  • US7920420B2 patent drawing
  • US7920420B2 patent drawing

AI summary

A method of programming a flash memory device may include dividing a plurality of memory cells into a plurality of groups according to a threshold voltage state, the memory cells configured to store multi bit data. The plurality of memory cells may be programmed with a program data. The memory cells of the divided groups may be respectively selected and programmed by divided group during the programming of the plurality of memory cells.