Flash Memory Wear Leveling via Hierarchical Modify Count Tracking
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Solution Overview
Problem
Existing flash memory systems suffer from uneven wear and tear, leading to premature failure due to concentrated write and erase operations on specific physical blocks, which reduces the life cycle and availability of memory, and existing wear leveling methods are inefficient and resource-intensive.
Innovation Solution
A method that balances the access frequency of physical blocks by introducing a hierarchical level system for logical blocks, swapping data between physical blocks and free blocks based on modify counts, and resetting levels when all blocks reach a uniform level, thereby distributing wear evenly across all blocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional flash memory writing methods are used, then data can be stored in logical pages, but physical blocks experience uneven wear and concentrated write disturbances
Solution Approach 1:
The patent introduces a modify count field in the FAT structure that tracks the number of modifications to each physical block before actual writing occurs. This preliminary tracking allows the system to identify and redistribute writes to blocks with lower modify counts, preventing concentrated wear before it happens. The wear leveling action is taken in advance based on predicted wear patterns rather than reactively after damage occurs.
Solution Approach 2:
The patent implements a feedback mechanism where the modify count field continuously monitors physical block usage patterns. This feedback information is used to dynamically adjust the mapping between logical and physical blocks, directing future writes away from blocks that have already experienced significant wear. The system learns from past write patterns and adapts its behavior to distribute wear more evenly across all physical blocks.
2Reliability
If wear leveling is implemented to distribute writes evenly, then physical block longevity improves, but system complexity and computational overhead increase
Solution Approach 1:
The patent introduces a FAT (File Allocation Table) structure as an intermediary layer between the logical file system and physical storage blocks. The FAT contains modify count fields that act as mediators, tracking physical block usage without requiring complex real-time analysis of write patterns. This intermediary structure simplifies the wear leveling logic by providing pre-computed usage metrics that can be easily queried and acted upon, reducing the computational complexity compared to traditional wear leveling algorithms.
Solution Approach 2:
The patent changes the parameter tracking approach by using a simple modify count field in the FAT structure rather than complex usage histograms or probability distributions. This parameter change transforms the wear leveling problem from requiring sophisticated statistical analysis to simple integer comparison and increment operations. The modify count serves as a sufficient statistic for wear prediction, dramatically reducing the computational overhead while maintaining effective wear distribution.
3Reliability
If frequent updates to logical pages are performed, then data currency improves, but physical blocks reach their write limit prematurely
Solution Approach 1:
The patent uses the FAT structure as a copy of metadata that mirrors physical block usage information without requiring direct manipulation of physical blocks for every update. When logical pages are updated, the system updates the corresponding FAT entry's modify count rather than immediately performing complex physical block operations. This copying approach allows frequent logical updates to be tracked efficiently, with physical block remapping occurring only when necessary based on the accumulated modify count information, thereby preserving physical block life while maintaining data currency.
Data Source
AI summary
A hierarchical mechanism for preventing concentrated wear on single physical block or a specific set of physical blocks in the physical memory is proposed. The logical blocks mapping to the physical blocks in the physical memory are classified into two different levels for implicitly representing the modification times of the physical blocks. A modify count and a maximum modify count are further included for counting the modification times in a single process of the hierarchical mechanism and for limiting the modification times in single process, leading to the probabilities of all the physical blocks being modified in the physical memory being balanced. The breakdown of the physical memory caused by the breakdown of a specific set of physical blocks or single physical block is thus prevented.