Flash Memory Controller Lpage Identification Headers
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Solution Overview
Problem
Current flash memory storage technologies face limitations in performance, efficiency, and utility due to challenges in effectively managing and accessing data in non-volatile memory, particularly in handling varying data sizes and spanning read units across page boundaries.
Innovation Solution
A method involving a flash memory controller that maps logical block addresses to non-volatile memory logical page numbers, storing data in spanning read units that cross page boundaries, and using a mapping function to convert host storage addresses to read unit addresses with encoded length information, enabling efficient data retrieval and recycling of memory space.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If data is stored in fixed-size pages aligned with read units, then memory access is simplified and error correction is efficient, but storage efficiency decreases due to inability to handle varying data sizes and spanning pages
Solution Approach 1:
The patent segments data into variable-sized logical pages (Lpages) that can span multiple fixed-size read units. Each Lpage is independently addressable and can be stored across read unit boundaries, allowing flexible data organization while maintaining the fixed read unit structure for efficient error correction and memory access. The Lpage identification headers enable precise location tracking of each segmented Lpage within the read unit structure.
Solution Approach 2:
The patent introduces an additional addressing dimension by mapping logical block addresses (LBAs) to both read unit addresses and Lpage offsets within those read units. This two-dimensional addressing scheme (read unit level + Lpage level) allows variable-sized Lpages to be efficiently located and accessed within the fixed read unit structure, resolving the contradiction between flexible storage and simple access.
2Adaptability or versatility
If spanning read units are used to store variable-sized data, then storage flexibility and efficiency improve, but complexity increases in locating and managing data across page boundaries
Solution Approach 1:
The patent performs preliminary organization of data into fixed-size Lpages with identification headers before writing to the NVM. This pre-organization includes calculating read unit addresses and Lpage offsets in advance, and embedding location information in the Lpage headers. When data is retrieved, the pre-stored location information enables direct access without complex search or management operations, reducing the apparent complexity despite spanning read units.
Solution Approach 2:
The Lpage identification header acts as an intermediary that bridges the variable-sized Lpage structure and the fixed read unit structure. The header contains encoded length information and location data that mediates between the flexible Lpage boundaries and the rigid read unit boundaries, simplifying the management of spanning data by providing explicit location metadata.
3Reliability
If fixed granularity read units are used for error correction, then reliability is maintained, but storage efficiency decreases due to inability to read partial pages
Solution Approach 1:
The patent applies local quality by treating each Lpage as an independent data unit with its own error correction characteristics. Even though read units have fixed granularity for error correction, each Lpage within a read unit can be independently addressed and managed. This allows error correction to operate at the read unit level (maintaining reliability) while logical operations occur at the finer Lpage granularity (improving storage efficiency).
Data Source
AI summary
A method includes the steps of storing non-header data into a plurality of logical pages (“Lpages”) of a non-volatile memory (“NVM”), each Lpage including a number of read units, wherein at least one of the read units is a spanning read unit that spans Lpage boundaries and includes a first byte of at least one Lpage starting in the read unit, storing, in each of the at least one spanning read units that include the first byte of the at least one Lpage starting in the read unit, an Lpage identification header per each of the at least one Lpages starting in the spanning read unit, each Lpage identification header identifying a location of the first byte of the respective Lpage starting within the respective spanning read unit, and locating an Lpage of data stored in the NVM by referring to an entry stored a flash memory controller map table.