Flash Memory Mapping for Variable-Size Word Line Compatibility

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Solution Overview

Problem

Flash memory devices face compatibility issues due to varying sizes of word lines within data blocks, leading to inefficiencies in data writing and reading processes.

Innovation Solution

A method for managing flash memory that involves establishing a mapping table to correlate logical word lines with physical word line groups, where each group contains varying numbers of data pages, allowing for parallel data writing and reading across different types of flash memory particles.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If data is written into word lines with varying numbers of data pages, then compatibility with different flash memory particles is improved, but the writing algorithm complexity increases

Engineering Contradiction:
Improvecompatibility with flash memory particlesVSAvoidwriting algorithm complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the writing process into distinct steps: acquiring write requests, determining logical word line addresses, looking up physical word line groups in a mapping table, and writing data to specific physical word lines. This segmentation simplifies the overall algorithm by breaking down the complex task of handling variable-sized word lines into manageable, standardized operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a mapping table as an intermediary between logical word lines and physical word line groups. This mapping table stores the correspondence relationships and data page counts, allowing the system to handle varying word line sizes without complex conditional logic in the writing algorithm. The mapping table acts as a mediator that translates logical addresses to physical locations with varying capacities.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If a mapping table is established to map logical word lines to physical word line groups, then data management efficiency is improved, but the time required for address translation increases

Engineering Contradiction:
Improvedata management efficiencyVSAvoidaddress translation time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The mapping table is pre-established during system initialization or firmware loading, storing all the correspondence relationships between logical word lines and physical word line groups before actual data operations begin. This preliminary action ensures that during data writing and reading, the system only needs to perform simple table lookups rather than complex calculations, significantly reducing address translation time during operational phases.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250224866A1Method for managing flash memory and flash memory device
Publication Date: 2025.07.10 DAPUSTOR CORP
  • US20250224866A1 patent drawing
  • US20250224866A1 patent drawing
  • US20250224866A1 patent drawing

AI summary

A method for managing flash memory and a flash memory device are provided. By acquiring a logical word line address corresponding to each logic unit in at least one logic unit and looking up a mapping table according to the logical word line address corresponding to each logic unit, and determining a physical word line group corresponding to the logical word lines of each logic unit, in this application, the mapping table can be used to map the logical word lines and the physical word line groups, the physical word line group includes at least one physical word line, and the numbers of data pages included in at least two physical word lines are not exactly the same, and different types of flash memory particles are adapted to improve compatibility of the flash memory device with flash memory particles.