Flash Memory Reference Voltage Margin Control

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Solution Overview

Problem

As information storage demands increase, multilevel memory systems face challenges in maintaining accurate detection of memory cell content due to decreasing voltage separation of reference levels and variations within memory cells and circuits, leading to erroneous readings.

Innovation Solution

A multilevel memory system with adjustable reference cell windows and margins, featuring bi-directional cell window adjustment, independent voltage reference levels, and relative margin control, which allows for precise voltage mode sensing and error correction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multilevel memory systems store more bits per cell, then storage density increases, but voltage separation of reference levels decreases leading to detection errors

Engineering Contradiction:
Improvestorage densityVSAvoiddetection accuracy
Core Design Contradiction:
Quantity of substanceVSMeasurement precision

Solution Approach 1:

The patent implements dynamic adjustment of reference levels and margins through control circuits that can shift reference voltage levels and adjust margin widths in real-time. This allows the system to adapt to varying voltage separations as more bits are stored per cell, maintaining detection accuracy despite decreasing voltage margins.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes electrical parameters (reference voltage levels and margin widths) to optimize detection accuracy. By independently adjusting reference levels and margin parameters, the system compensates for reduced voltage separation when storing more bits per cell.

Inventive Principle:
Principle #35Parameter changes

2Volume of moving object

If physical dimensions of memory cells are decreased, then storage capacity increases, but variation within memory cells increases causing erroneous detection

Engineering Contradiction:
Improvememory cell sizeVSAvoiddetection reliability
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent applies different margin widths and reference levels to different voltage windows locally. Each voltage window can have optimized margins tailored to its specific characteristics, compensating for variations within individual memory cells and improving detection reliability despite smaller cell dimensions.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system performs preliminary adjustment of reference levels and margins before actual detection operations. This pre-calibration compensates for anticipated variations in small memory cells, ensuring reliable detection from the outset.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If reference levels are adjusted to compensate for variations, then detection accuracy improves, but system complexity increases

Engineering Contradiction:
Improvedetection accuracyVSAvoidcontrol circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent divides the control system into separate independent modules: reference level adjustment circuits, margin width control circuits, and sensing circuits. This segmentation allows each module to be optimized independently while working together to improve detection accuracy, managing overall system complexity through modular design.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS7596037B2Independent bi-directional margin control per level and independently expandable reference cell levels for flash memory sensing
Publication Date: 2009.09.29 SILICON STORAGE TECHNOLOGY INC
  • US7596037B2 patent drawing
  • US7596037B2 patent drawing
  • US7596037B2 patent drawing

AI summary

A memory system includes reference level generators that may provide programmable margins, and programmable verify voltage levels. The reference levels may be shifted within a range of voltages with varying differences between reference voltage levels and with different margins and verify levels.