Flash Memory Margin Read Circuit Without External Test Voltage
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Solution Overview
Problem
The existing margin read test operations for flash memory require external test equipment and stabilization time for external voltages, leading to inefficiencies in testing read margins.
Innovation Solution
The implementation of an internal margin read test circuit within the flash memory, utilizing a sense amplifier and a margin read test circuit to perform the test operation using internal currents, reducing the need for external equipment and stabilization time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If external voltage is used in margin read test operation, then read margin can be investigated, but a lot of time is taken to stabilize the external voltage
Solution Approach 1:
The patent extracts the margin read test function from external test equipment and implements it within the flash memory device itself through a dedicated margin read test circuit. This internal circuit generates test currents and controls the read operation autonomously, eliminating the need for external voltage stabilization and significantly reducing test time while maintaining measurement precision
Solution Approach 2:
The flash memory device performs the margin read test operation by itself using an internal margin read test circuit that generates test currents and controls the read operation. This self-service approach eliminates dependency on external test equipment and voltage stabilization, thereby reducing test time while maintaining accurate read margin measurement
2Measurement precision
If external test equipment is used for margin read test, then read margin testing can be performed, but testing speed is reduced due to stabilization requirements
Solution Approach 1:
The patent extracts the margin read test function from external test equipment and implements it within the flash memory device itself through a dedicated margin read test circuit. This internal circuit generates test currents and controls the read operation autonomously, eliminating the need for external voltage stabilization and significantly reducing test time while maintaining measurement precision
Solution Approach 2:
The flash memory device performs the margin read test operation by itself using an internal margin read test circuit that generates test currents and controls the read operation. This self-service approach eliminates dependency on external test equipment and voltage stabilization, thereby reducing test time while maintaining accurate read margin measurement
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for faster and more efficient margin read testing by eliminating the need for external test equipment and reducing stabilization time, thereby enhancing the speed and efficiency of the testing process.
Implementation Method 1
a sense amplifier configured to provide a sensing line with a sensing current for sensing data stored in the first memory cell or the second memory cell
Implementation Method 2
a margin read test circuit configured to perform a margin read test operation in which the margin read test circuit provides the sensing line with a margin current for testing a read margin of the data stored in the first memory cell or the second memory cell
Data Source
AI summary
A flash memory includes a first memory cell connected with a selected word line and a first bit line, a second memory cell connected with the selected word line and a second bit line, a sense amplifier that provides a sensing line with a sensing current for sensing data stored in the first memory cell or the second memory cell, a bit line selection circuit that selects a bit line by connecting the sensing line with the first bit line or the second bit line, and a margin read test circuit that performs a margin read test operation in which the margin read test circuit provides the sensing line with a margin current for testing a read margin of the data stored in the first memory cell or the second memory cell that is connected to the selected bit line.