Flash Memory Device With MMC Interface Circuit
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Solution Overview
Problem
Conventional multimedia cards with a high-capacity buffer RAM and flash memory merged into a single chip face challenges in chip size and fabrication, as the buffer RAM area is larger than the flash memory area, making it difficult to integrate the CPU and ROM with the flash memory.
Innovation Solution
A flash memory device with a non-volatile memory cell array and a multimedia card interface circuit on a single integrated chip, which includes a state machine circuit to manage operations without a local CPU and volatile buffer RAM, using card firmware code to translate logical addresses to physical addresses for access, allowing the host system to control read/program/erase operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a high-capacity buffer RAM and flash memory are merged into a single chip, then data throughput and performance are improved, but chip area increases and fabrication difficulty increases
Solution Approach 1:
The patent extracts the CPU and ROM from the memory chip, leaving only the flash memory array and basic control logic. This removes the high-area components while maintaining the ability to achieve high data throughput through the simplified architecture that directly interfaces with the host system.
Solution Approach 2:
The patent combines the flash memory array with a minimal control interface into a single chip, eliminating the need for separate CPU and ROM chips. This merging achieves high integration without requiring large buffer RAM areas, as the host system handles data buffering externally.
2Productivity
If a high-capacity buffer RAM and flash memory are merged into a single chip, then data throughput and performance are improved, but device complexity increases
Solution Approach 1:
The patent extracts the complex CPU and ROM components from the memory device, significantly reducing device complexity. The remaining structure consists of simple flash memory cells and basic control logic that interfaces directly with the host, eliminating the need for complex on-chip processing and firmware storage.
Solution Approach 2:
The patent segments the memory system into two parts: a simple flash memory chip for storage and the host system for control and buffering. This segmentation places complexity in the host system while keeping the memory chip itself simple, thereby reducing the device complexity of the flash memory unit.
3Adaptability or versatility
If CPU and ROM are integrated with flash memory, then functionality is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent extracts the CPU and ROM from the flash memory chip, reducing the manufacturing precision requirements. By removing these complex components that require precise alignment and fabrication, the chip can be manufactured with standard flash memory processes, improving yield and reducing cost while maintaining essential storage functionality.
4Area of stationary object
If a compact flash memory device without CPU and buffer RAM is created, then chip size is reduced, but operational complexity is shifted to the host system
Solution Approach 1:
The patent makes the host system perform multiple functions: data buffering, address translation, and memory control. This universality allows the flash memory chip to remain simple and compact while the host system, which already performs similar functions for other devices, handles the additional control responsibilities without significant added complexity.
Data Source
AI summary
An MMC form-factor flash memory device can include a non-volatile memory cell array and a multimedia card interface circuit that is configured to interface with an external host system using a multimedia card communication protocol. A peripheral circuit is configured to control read/program/erase operations of the non-volatile memory cell array under the control of the multimedia card interface circuit, wherein the non-volatile memory cell array, the multimedia card interface circuit, and the peripheral circuit are on a single integrated circuit chip. Related methods of operating are also disclosed.