Flash Memory Read Error Correction via Multi-Bias Voltage Detection

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Solution Overview

Problem

Flash memory cells experience read errors due to shifting and deformation of threshold voltage lobes over time, affecting the accuracy of data retrieval in multi-level cell configurations.

Innovation Solution

A method and system that perform multiple read operations with varying bias voltages to detect and correct threshold voltage shifts, associating logic values with flash memory cells and adjusting programming voltages to maintain data integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple read operations with varying bias voltages are performed to detect and correct threshold voltage shifts, then data retention and read accuracy are improved, but device complexity and operation time increase

Engineering Contradiction:
Improvedata retentionVSAvoidoperation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent performs preliminary read operations with different bias voltages to detect threshold voltage shifts before final data retrieval. By proactively identifying cells that have shifted to negative threshold voltages and correcting their logic values beforehand, the system ensures data retention without requiring complex real-time correction mechanisms during normal operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements feedback by comparing read results from multiple bias voltage conditions and using this information to correct detected errors. The read unit analyzes discrepancies between reads performed at different bias voltages and adjusts logic values accordingly, creating a self-correcting mechanism that improves reliability while managing complexity through intelligent error correction.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If multiple read operations with varying bias voltages are performed to detect and correct threshold voltage shifts, then read accuracy is improved, but operation time increases

Engineering Contradiction:
Improveread accuracyVSAvoidoperation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies partial action by performing multiple read operations only when necessary—specifically when threshold voltage shifts are detected or when operating conditions suggest potential errors. Rather than always performing exhaustive multi-voltage reads, the system selectively applies additional read operations to affected cells, reducing overall operation time while maintaining high read accuracy for critical data.

Inventive Principle:
Principle #16Partial or excessive action

3Measurement precision

If programming voltages are adjusted to maintain data integrity in the presence of lobe shifts, then read accuracy is improved, but device complexity increases

Engineering Contradiction:
Improveread accuracyVSAvoidprogramming complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent employs dynamic voltage adjustment where programming and read voltages are adaptively modified based on detected threshold voltage distributions. The system dynamically selects appropriate bias voltages for read operations and adjusts programming voltages to account for lobe shifts, creating a flexible system that maintains read accuracy without requiring fixed, overly complex voltage scheduling.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8724387B2Method, system, and computer readable medium for reading and programming flash memory cells using multiple bias voltages
Publication Date: 2014.05.13 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US8724387B2 patent drawing
  • US8724387B2 patent drawing
  • US8724387B2 patent drawing

AI summary

A system, method and computer readable medium for programming and reading flash memory cells. Respective first and second read operations may be performed while supplying respective first and second bias voltage to multiple flash memory cells, to provide respective first and second read results, where the first bias voltage may be higher then the second bias voltage, and providing a read outcome that may be responsive to the first read results and to the second read results. A programming method may include performing first and second programming operations while supplying respective first and second bias voltages to multiple flash memory cells. The programming method may further include performing the first programming operation while programming information mapped to a highest least significant bit positive lobe, and performing the second programming operation while programming information mapped to at least one other least significant bit positive lobe.