Flash Memory Controller Multi-Block Erase Recycling

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Solution Overview

Problem

Flash memory systems face inefficiencies due to the inability to perform sequential erasure of data at the page level and the limitation of in-place updates, leading to invalid pages that require costly recycling processes.

Innovation Solution

A method for controlling flash memory that supports a multi-block erase function, allowing simultaneous erasure of data across multiple blocks, and calculates the cost of different block recycling schemes to select the most optimized approach, enabling selective erasure and management of invalid pages at the page level.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If data is updated in place in flash memory pages, then update operations are simple, but flash memory does not support in-place updates requiring data to be moved to different pages

Engineering Contradiction:
Improveupdate operation simplicityVSAvoidin-place update capability
Core Design Contradiction:
Ease of operationVSAdaptability or versatility

Solution Approach 1:

The patent introduces a buffer memory as an intermediary between the host and flash memory. The buffer temporarily stores data during update operations, allowing the system to perform logical in-place updates by coordinating reads from old pages, writes to new pages, and management of valid/invalid page states, even though the physical flash memory cannot overwrite existing data

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If erasure is performed at block level, then flash memory architecture is simple, but page-level selective erasure is required for efficient recycling

Engineering Contradiction:
Improveerase architecture simplicityVSAvoidblock recycling efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent segments the block erasure operation into page-level operations by introducing granular invalid page management. The flash memory controller identifies and manages individual invalid pages within blocks, allowing selective recycling of only the necessary pages rather than erasing entire blocks, thereby improving recycling efficiency while maintaining the underlying block architecture

Inventive Principle:
Principle #1Segmentation

3Loss of energy

If multiple blocks are erased simultaneously, then block recycling cost is reduced, but multi-block erase function must be supported

Engineering Contradiction:
Improveblock recycling costVSAvoidmulti-block erase function support
Core Design Contradiction:
Loss of energyVSAdaptability or versatility

Solution Approach 1:

The patent merges multiple block erasure operations into a single simultaneous operation. The flash memory controller identifies multiple blocks containing invalid pages and erases them concurrently in one operation, reducing the total number of erasure cycles required and lowering the overall recycling cost, while requiring the flash memory to support multi-block erase functionality

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8554986B2Device and method of controlling flash memory
Publication Date: 2013.10.08 KIOXIA CORP
  • US8554986B2 patent drawing
  • US8554986B2 patent drawing
  • US8554986B2 patent drawing

AI summary

Disclosed is a flash memory controlling method and controlling device. The flash memory controlling method including calculating a cost for each of available block recycling schemes based on a multi-block erase function when the multi-block erase function is supported, the multi-block erase function being a function that simultaneously erases data stored in a plurality of blocks of a flash memory and selecting at least one scheme from among the available block recycling schemes based on the calculated cost, and managing at least one block using the at least one method selected from among the available block recycling schemes.