Flash Memory Online Repair via Post-Erase Defect Detection
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Solution Overview
Problem
Memory cells, particularly flash memory cells, can develop defects during manufacturing or over time, leading to isolation breakdowns and failures during erase operations, which existing testing methods may not detect, causing functional issues and requiring time-consuming data relocation that risks data loss.
Innovation Solution
An online repair method that checks memory cells post-erase operation and replaces defective cells with spare memory portions, allowing seamless continuation of memory functionality without data relocation, using a spare sector or page to maintain logical memory area integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing testing methods are used during manufacturing, then production time is reduced, but memory cell defects are not detected leading to functional failures
Solution Approach 1:
The patent performs preliminary actions by checking memory cells during the erase operation itself and preparing spare memory portions in advance. The system identifies defective cells during the erase process and has spare memory portions ready for immediate replacement, avoiding both production delays and functional failures.
Solution Approach 2:
The patent implements beforehand cushioning by allocating spare memory portions in advance that can be used to replace defective memory cells. This preparation ensures that when defects are detected during erase operations, there are already reserved resources available for replacement, maintaining system reliability without requiring time-consuming data relocation.
2Reliability
If memory cells are checked after erase operation, then defective cells are detected, but data relocation is required which risks data loss
Solution Approach 1:
The patent uses copying by maintaining spare memory portions that are identical in structure and capacity to the target memory. When defects are detected, the system copies data to the spare memory portion rather than relocating data, which eliminates the risk of data loss during the transfer process while ensuring complete defect detection.
3Reliability
If spare memory portions are used for replacement, then memory functionality is maintained, but system complexity increases
Solution Approach 1:
The patent extracts the complexity of memory management by separating the defect detection and replacement functions into a dedicated processing unit. This unit independently manages the checking of memory cells during erase operations and the replacement with spare portions, simplifying the overall system architecture while maintaining functionality continuity.
4Productivity
If online repair method is implemented, then data relocation is avoided, but processing time for erase operation increases
Solution Approach 1:
The patent implements continuity of useful action by performing the check for defective memory cells during the erase operation itself, rather than as a separate subsequent step. The processing unit checks memory cells while the erase operation is in progress, and immediately replaces defective cells with spare portions, maintaining continuous productive action without interrupting the overall process flow.
Data Source
AI summary
A method is suggested for processing a target memory, the method comprising the steps of (i) checking the target memory subsequent to an erase operation directed to the target memory; and (ii) replacing the target memory with a spare memory in case a defect is detected.