Flash Memory Page Availability Management for Downgraded Dies
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Solution Overview
Problem
Existing memory devices with MLC flash memory face instability issues and data errors when using downgraded flash dies, leading to performance problems during manufacturing and usage, necessitating a method for optimal performance without introducing side effects.
Innovation Solution
A method for page availability management that involves obtaining ECC error tables, identifying local and global risky pages, and generating a global risky page table to control the memory device to skip using these pages, thereby optimizing performance without increasing costs or introducing side effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If MLC flash memory is used to increase capacity and reduce cost, then storage capacity increases and cost decreases, but data stability and access reliability deteriorate
Solution Approach 1:
The patent segments the flash memory into multiple blocks and further divides each block into pages, creating a hierarchical structure. This segmentation allows individual pages to be managed independently, enabling the system to identify and isolate problematic pages while maintaining access to healthy pages, thus preserving overall system reliability while using high-capacity MLC memory.
Solution Approach 2:
The patent introduces an intermediary management mechanism that mediates between the host system and the flash memory. This intermediary layer monitors page health status, tracks error patterns, and dynamically manages page availability, acting as a buffer that protects the host from memory instability while maintaining high-capacity storage functionality.
2Quantity of substance
If downgraded flash die is applied to increase capacity, then storage capacity increases, but manufacturing yield and data error rate worsen
Solution Approach 1:
The patent performs preliminary characterization and testing of flash die during manufacturing to identify pages with high error rates before the memory device is shipped. By pre-identifying and marking problematic pages as unavailable, the system compensates for manufacturing variations in downgraded flash die, ensuring that only reliably functioning pages are used in production, thereby maintaining manufacturing yield despite using lower-grade components.
3Reliability
If management mechanisms are added to ensure access control, then data reliability improves, but device complexity increases
Solution Approach 1:
The patent implements local quality management by maintaining separate error tables and availability status for each block and page individually, rather than applying uniform management across the entire memory. This localized approach allows the controller to apply different management strategies to different regions based on their specific health status, improving reliability while keeping the complexity distributed and manageable.
Solution Approach 2:
The patent enables the flash memory to self-monitor and self-manage its own health status through built-in error detection and page availability tracking mechanisms. The memory device automatically identifies problematic pages and updates its internal availability tables without requiring external intervention, reducing the burden on the controller while maintaining high data reliability.
4Reliability
If page screening and management is implemented to improve performance, then data error rate decreases, but processing time and computational overhead increase
Solution Approach 1:
The patent merges the page screening and error management functions into the existing block management infrastructure of the flash memory controller. By combining page-level error tracking with block-level management operations, the system achieves comprehensive error protection without requiring separate processing passes, thereby reducing computational overhead and processing time while maintaining low data error rates.
Data Source
AI summary
A method for performing page availability management of a memory device, the associated memory device and electronic device, and page availability management system are provided. The method may include: obtaining a set of page Error Correction Code (ECC) error tables of a non-volatile (NV) memory; based on a predetermined rule, finding respective local risky pages of at least one portion of blocks within a plurality of blocks according to the set of page ECC error tables, respectively, to generate local risky page counts respectively corresponding to page indexes; finding one or more global risky pages corresponding to one or more page indexes of the multiple page indexes according to the local risky page counts; and writing a global risky page table into the memory device, for controlling the memory device to skip using the one or more global risky pages of each of the plurality of blocks.