Page Cache Control for Flash Memory Write Speed and Lifetime

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Solution Overview

Problem

Conventional methods for writing data in NAND-type flash memory systems, such as those using the FAT file system, face challenges in speed and rewriting lifetime due to the need for multiple non-volatile memories, which increases cost and size, and decreases performance when writing small-sized data.

Innovation Solution

An access device with a page cache information setting unit that allocates specific logical addresses to physical blocks temporarily holding data, allowing for efficient data writing by reducing the need for the 'saving process' and minimizing the number of physical blocks required for caching, thereby enhancing writing speed and preventing rewriting lifetime degradation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If multiple non-volatile memories are used to improve writing speed, then writing speed is improved, but device complexity and size increase

Engineering Contradiction:
Improvewriting speedVSAvoiddevice complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent segments the writing process into two distinct phases: a fast programming phase that writes data to a cache area in the same non-volatile memory, and a slower saving phase that consolidates data to the file system. This segmentation allows the system to achieve high writing speeds for user data while using a single non-volatile memory, avoiding the complexity of multiple memory devices.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements preliminary action by pre-allocating cache areas within the non-volatile memory before writing operations begin. Data is first written to these pre-prepared cache areas at high speed, and only afterward is the saving process triggered to consolidate the data. This preliminary preparation eliminates the need for multiple memory devices while maintaining high writing performance.

Inventive Principle:
Principle #10Preliminary action

2Speed

If multiple non-volatile memories are used to improve writing speed, then writing speed is improved, but manufacturing cost increases

Engineering Contradiction:
Improvewriting speedVSAvoidmanufacturing cost
Core Design Contradiction:
SpeedVSEase of manufacture

Solution Approach 1:

By segmenting the writing process into programming and saving phases, the patent enables high-speed writing using a single non-volatile memory device. This eliminates the need to manufacture and assemble multiple memory devices, significantly reducing manufacturing costs while maintaining improved writing speed through the cache-based approach.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent makes the single non-volatile memory perform multiple functions: it serves as both the cache storage for high-speed writing and the permanent storage for file system data. This multi-functionality eliminates the need for separate cache memory devices, reducing manufacturing complexity and cost while achieving high writing speeds.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Speed

If multiple non-volatile memories are used to improve writing speed, then writing speed is improved, but rewriting lifetime decreases

Engineering Contradiction:
Improvewriting speedVSAvoidrewriting lifetime
Core Design Contradiction:
SpeedVSDuration of action of stationary object

Solution Approach 1:

The patent segments data into user data and file system data, writing user data to cache areas at high speed without immediately triggering the saving process. This reduces the frequency of full memory rewriting operations, thereby extending the rewriting lifetime of the non-volatile memory while maintaining high writing speed for user data.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent maintains continuous high-speed writing to cache areas without interruption, only triggering the saving process when necessary. This continuous useful action allows the system to achieve high writing speeds while minimizing the number of rewriting cycles on the entire memory, thus preserving the rewriting lifetime.

Inventive Principle:
Principle #20Continuity of useful action

4Speed

If multiple non-volatile memories are used to improve writing speed, then writing speed is improved, but memory footprint increases

Engineering Contradiction:
Improvewriting speedVSAvoidmemory footprint
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The patent segments the non-volatile memory into cache areas and file system areas, allowing efficient use of the same physical memory space for different purposes. This segmentation enables high-speed writing to cache areas without requiring additional memory devices, thus avoiding increased memory footprint while achieving improved writing speed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent makes the same non-volatile memory serve dual purposes as both cache and permanent storage. By using the memory efficiently for both functions, the system achieves high writing speeds without needing additional memory capacity, thereby avoiding increased memory footprint.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8914579B2Access device, information recording device, controller, and information recording system
Publication Date: 2014.12.16 PANASONIC HOLDINGS CORP
  • US8914579B2 patent drawing
  • US8914579B2 patent drawing
  • US8914579B2 patent drawing

AI summary

Provided is a method that, in the case of managing areas of a non-volatile memory of an information recording module by a file system, increases the speed of processing for writing file data and file system management information, and furthermore prevents a decrease in the rewriting lifetime of the non-volatile memory. The information recording module (2) is provided with a page cache control unit (217) that stores page cache information (224) in the non-volatile memory (22) of the information recording module (2) and performs control such that a specific physical block is used as a cache when writing small-sized data. Also, an access module (1) is provided with a page cache information setting unit (104) that sets information necessary for page cache control in the information recording module (2). The combination of the access module (1) and the information recording module (2) prevents the execution of needless saving process with use of page caching when writing small-sized data, thereby increasing the speed of writing processing.