Flash Memory Page Decoder Test Method Using Iterative Unique Bit Sequences
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Solution Overview
Problem
Testing the functionality of a page decoder in flash memory is time-consuming as it requires programming all pages with a unique signature, and existing methods do not guarantee fault-free connections between output lines and pages.
Innovation Solution
A method that iteratively generates a unique bit sequence and programs it into N/2 pages at a time, reducing the number of operations required to log2N, allowing each page to have a unique signature without using observation points, and utilizing a page decoder to read out the unique sequences for verification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all pages are programmed with a unique signature to test page decoder functionality, then the page decoder functionality is verified, but the test time increases significantly
Solution Approach 1:
The patent segments the unique signature into multiple parts and distributes them across different pages. Instead of programming each page with a complete unique signature, the system uses a segmented approach where pages are programmed with portions of signatures, reducing the total programming operations required while still enabling verification of page decoder functionality.
Solution Approach 2:
The patent applies partial action by programming only a subset of pages with unique signatures rather than all pages. This partial programming approach is sufficient to verify page decoder functionality without the time cost of programming every single page, thus resolving the contradiction between verification reliability and test time.
2Ease of operation
If observation points (scan chain) are inserted at the output of the page decoder to test functionality, then the testing process is simplified, but the connection faults between output lines and pages cannot be detected
Solution Approach 1:
The patent introduces an intermediary verification mechanism where a verification signal is coupled to the output of the page decoder and fed back through the memory array to specific memory cells. This intermediary feedback path enables detection of connection faults between output lines and pages while maintaining testing simplicity, as the verification signal provides indirect observation of the connection integrity without requiring complex observation points.
3Measurement precision
If a unique signature is written into each page to guarantee correct page decoder operation, then the page decoder points to correct locations, but the programming process becomes very time-consuming
Solution Approach 1:
The patent merges the verification function with the programming process by using the same programming operations to both load data and establish the unique signatures. The verification signal is integrated into the existing memory cell structure, allowing simultaneous programming and verification without additional time-consuming separate operations, thus improving productivity while maintaining measurement precision.
Data Source
AI summary
A method and apparatus for testing correct operation of a page decoder in a memory is provided. In one implementation, the method includes erasing the memory to reset all memory cells associated with each of the N pages in the memory, and iteratively generating a unique bit sequence of M bits and programming the unique bit sequence into a plurality of the N pages at a given time until each of the N pages contains a unique bit sequence relative to other pages in the memory. Responsive to each of the N pages having a unique bit sequence, the method further includes using the page decoder to read out each unique bit sequence associated with the N pages to verify correct operation of the page decoder.