Flash Memory Page Erase Detection Circuit

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Solution Overview

Problem

Current flash memory systems consume significant resources and time determining whether a page is erased, as they rely on external controllers to count 1s or 0xFF patterns, leading to inefficient data transfer and bandwidth utilization.

Innovation Solution

Implementing a flash memory device with an accumulator and comparator to determine if a page is erased by summing voltage or current changes on bit lines and comparing the signal value with a predetermined value, allowing the flash memory to generate an indication signal directly, reducing the need for extensive data transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If data transfer between flash memory controller and non-volatile flash memory is performed to determine page state, then measurement accuracy is improved, but bandwidth consumption increases and time is lost

Engineering Contradiction:
Improvepage state determination accuracyVSAvoidtime for determining erased page
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-calculating and storing the number of 1s (or 0xFF patterns) in each page during the programming process. When a read operation occurs, the controller directly retrieves this pre-computed value from a register or memory structure, eliminating the need to transfer and count data at read time. This preliminary computation during programming resolves the contradiction by preparing the information in advance, making subsequent page state determination instantaneous without bandwidth consumption.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If data transfer between flash memory controller and non-volatile flash memory is performed to determine page state, then measurement precision is improved, but bandwidth utilization deteriorates

Engineering Contradiction:
Improvepage state determination accuracyVSAvoiddata traffic volume
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent extracts the essential information needed for page state determination (the count of 1s or 0xFF patterns) from the full page data. Instead of transferring entire pages to determine if they are erased, the system maintains only the extracted count value in a dedicated register or memory location. This extraction principle reduces data traffic volume dramatically while preserving measurement precision, as the count value alone suffices to determine page state without requiring full data transfer.

Inventive Principle:
Principle #2Taking out (Extraction)

3Measurement precision

If conventional method of counting 1s or 0xFF patterns by transferring data is used, then measurement precision is improved, but productivity deteriorates

Engineering Contradiction:
Improveerased page detection accuracyVSAvoidsystem performance
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The system performs the counting operation in advance during programming and stores the result. This preliminary action transforms a time-consuming operation that would otherwise occur during reads into a background computation that does not impact read performance. The pre-computed count values are readily available when needed, thereby improving productivity while maintaining measurement precision.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates a simplified copy of the essential information (count of 1s or 0xFF patterns) separate from the full page data. This copy resides in a dedicated register or memory structure that can be queried instantly. By maintaining this informational copy, the system enables fast page state determination without requiring access to or transfer of the actual page data, thus improving productivity while preserving accurate detection capability.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS10410724B2Erase page indicator
Publication Date: 2019.09.10 SK HYNIX INC
  • US10410724B2 patent drawing
  • US10410724B2 patent drawing
  • US10410724B2 patent drawing

AI summary

A flash memory device includes a flash memory comprising a plurality of pages for storing data, a control circuit configured to select a page of the plurality of pages in response to a received command, an accumulator configured to obtain a signal value of the selected page, and a comparator configured to compare the signal value with a predetermined value. The control circuit generates an indication signal indicative of a state of the selected page based on a comparison result.