Flash Memory Partial Sector Erasure via Select Transistors

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Solution Overview

Problem

Flash memory devices typically erase data in entire sectors or blocks, lacking the capability to efficiently erase partial sectors or blocks, which is necessary in certain applications.

Innovation Solution

A memory device design that includes a memory sector with select transistors and drivers, allowing for the selective erasure of memory cells by controlling voltage and signal levels on word lines, enabling partial sector erasure through the use of first and second control signals and voltage sources.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If flash memory erases entire sectors or blocks, then the erasure operation is simple and fast, but it cannot efficiently erase partial sectors or blocks

Engineering Contradiction:
Improveerasure flexibilityVSAvoiddriver control complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The memory sector is divided into multiple sub-sectors, each with its own dedicated driver. This segmentation allows independent control of each sub-sector, enabling partial erasure operations without affecting other sub-sectors. The row of select transistors further divides the memory sector into erasable sub-sectors, providing granular control over which portions are erased.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent enables erasure of only the necessary portion of a sector (partial action) rather than requiring erasure of the entire sector. By applying erasure voltage to specific sub-sectors through controlled drivers, the system performs exactly the erasure needed - no more, no less - improving efficiency for applications that only need to erase specific data regions.

Inventive Principle:
Principle #16Partial or excessive action

2Adaptability or versatility

If flash memory uses select transistors to separate memory sectors, then partial sector erasure becomes possible, but the device structure becomes more complex

Engineering Contradiction:
Improvepartial erasure capabilityVSAvoidselect transistor structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The memory sector is divided into multiple sub-sectors, each with its own dedicated driver. This segmentation allows independent control of each sub-sector, enabling partial erasure operations without affecting other sub-sectors. The row of select transistors further divides the memory sector into erasable sub-sectors, providing granular control over which portions are erased.

Inventive Principle:
Principle #1Segmentation

3Productivity

If entire sectors are erased at once, then the erasure process is fast and simple, but data management flexibility is reduced

Engineering Contradiction:
Improveerasure speedVSAvoiddata management flexibility
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent enables erasure of only the necessary portion of a sector (partial action) rather than requiring erasure of the entire sector. By applying erasure voltage to specific sub-sectors through controlled drivers, the system performs exactly the erasure needed - no more, no less - improving efficiency for applications that only need to erase specific data regions.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS8270223B2Memory device
Publication Date: 2012.09.18 MACRONIX INTERNATIONAL CO LTD
  • US8270223B2 patent drawing
  • US8270223B2 patent drawing
  • US8270223B2 patent drawing

AI summary

A memory device includes a memory sector including a memory sector, a row of select transistors and a number of drivers. The memory sector includes a plurality of word lines each couples to a plurality of memory cells. The row of select transistors select the memory sector and separate the memory sector from an immediately adjacent memory sector in the memory device. Each of the number of drivers is coupled to one of the plurality of word lines. A first one of the drivers is coupled to a first one of the word lines to receive a first control signal to conduct the first word line and a voltage source, and a second one of the drivers is coupled to a second one of the word lines to receive a second control signal to disconnect the second word line from the voltage source.