Flash Memory Pass Voltage Calibration for Read Accuracy

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Solution Overview

Problem

As memory cells in flash memory devices store multiple data states, the margins between adjacent threshold voltage ranges become smaller, leading to inaccurate data state determination due to shifts caused by quick charge loss, cumulative charge loss over time, and read disturb, making it difficult to reliably read data states as memory cells age.

Innovation Solution

The implementation of a method that involves generating an increasing voltage level during the read operation to activate all memory cells, determining a pass voltage at which all memory cells conduct, and using this voltage to accurately sense the data state of target memory cells, while reducing voltage stress on unselected cells to mitigate aging effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple data states are stored per memory cell to increase storage capacity, then storage capacity is improved, but measurement precision deteriorates due to smaller margins between adjacent threshold voltage ranges

Engineering Contradiction:
Improvestorage capacityVSAvoiddata state determination accuracy
Core Design Contradiction:
Quantity of substanceVSMeasurement precision

Solution Approach 1:

The patent dynamically adjusts the pass voltage parameter based on the age of the memory block. As memory cells age and threshold voltages shift, the pass voltage is recalibrated to compensate for these changes, maintaining accurate data state determination despite the reduced margins between adjacent states in multi-level cells.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system implements a feedback mechanism where the age of the memory block is determined based on programming history, and this age information is used to adjust the pass voltage for subsequent read operations. This closed-loop approach ensures that the pass voltage remains optimized for accurate sensing throughout the memory's operational lifetime.

Inventive Principle:
Principle #23Feedback

2Productivity

If high voltage is applied to activate memory cells for reading, then read capability is improved, but reliability deteriorates due to voltage stress accelerating aging effects

Engineering Contradiction:
Improveread capabilityVSAvoidmemory cell longevity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The pass voltage is made dynamic rather than fixed. The voltage level adjusts based on the determined age of the memory block, allowing the system to optimize between read capability and reliability. Younger blocks can tolerate higher voltages for faster reads, while older blocks use lower voltages to minimize further stress and extend longevity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the voltage parameter adaptively based on memory block age. By monitoring programming history and determining block age, the system modifies the pass voltage to balance the need for sufficient read capability with the need to minimize voltage stress that accelerates aging and reduces reliability.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves the accuracy of data state determination and extends the read capability of memory cells by reducing voltage stress, thereby enhancing the reliability and longevity of flash memory devices.

Implementation Method 1

detecting whether a data line connected to the memory cell experiences a change in voltage level caused by current flow through the memory cell

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS11309039B2Apparatus for determining a pass voltage of a read operation
Publication Date: 2022.04.19 MICRON TECHNOLOGY INC
  • US11309039B2 patent drawing
  • US11309039B2 patent drawing
  • US11309039B2 patent drawing

AI summary

Memories having a controller configured, during a pre-charge portion of a read operation, to apply a sequence of increasing voltage levels concurrently to each access line of a plurality of access lines, wherein each voltage level of the sequence of increasing voltage levels is higher than any previous voltage level of the sequence of increasing voltage levels and lower than any subsequent voltage level of the sequence of increasing voltage levels, and determine a particular voltage level of the sequence of increasing voltage levels corresponding to a point at which all memory cells of the plurality of strings of series-connected memory cells are first deemed to be activated while applying the sequence of increasing voltage levels.