Flash Memory Data Recovery During Power Failure
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing data storage systems face data loss issues during power recovery processes due to insufficient power in the super capacitor unit after flash memory erasure, particularly when a power outage occurs during the erasure of the table or cache area, leading to incomplete data transfer from cache to flash memory.
Innovation Solution
A data storage apparatus with a cache memory, nonvolatile memory, and a processor that saves user data and control information during power failures, and upon recovery, restores data to cache memory while stopping erasure processes and resaving data from nonvolatile memory to flash memory using instant power, ensuring complete data recovery even during subsequent power outages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the erasure process of flash memory is completed before saving data during power recovery, then the flash memory is ready for data storage, but insufficient power remains in the super capacitor unit to complete the data saving operation
Solution Approach 1:
The patent applies preliminary action by stopping the erasure process before it is completed and preserving the partially erased state in the flash memory. This allows the system to conserve remaining power in the super capacitor unit for the critical data saving operation, ensuring that data can be successfully written even with insufficient power for complete erasure. The partially erased flash memory blocks serve as a power-saving mechanism that enables data persistence during power recovery scenarios.
2Use of energy by moving object
If the erasure process is stopped during power outage, then power is conserved for data saving, but incomplete erasure may leave residual data that could cause system issues
Solution Approach 1:
The patent applies partial action by stopping the erasure process at an intermediate state rather than completing it. The flash memory is partially erased with some blocks remaining in their original state, which is sufficient for the system's purposes during power recovery. This partial erasure conserves power for data saving while the subsequent data writing operation overwrites any potentially problematic residual data, ensuring system reliability without requiring complete erasure.
3Reliability
If complete erasure of flash memory is performed during power recovery, then the flash memory is fully prepared for data storage, but the super capacitor unit depletes power before data saving can complete
Solution Approach 1:
The patent applies preliminary action by stopping the erasure process before completion and preserving the partially erased state. This strategic interruption conserves power in the super capacitor unit, ensuring that the remaining power can be adequately allocated to the data saving operation. The partially erased flash memory state is sufficient for system operation during power recovery, eliminating the need for complete erasure while maintaining reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution prevents data loss by ensuring complete data transfer from cache to flash memory during power recovery, even in the event of a power outage during erasure, maintaining the latest data integrity and avoiding incomplete saves.
Implementation Method 1
a technique for obtaining power for saving data from a volatile memory by using the capacitor discharge effect even during power supply shutdown caused by a power outage has been proposed
Data Source
AI summary
An apparatus includes a cache memory for storing user data and control information of the apparatus, a nonvolatile memory and a processor for executing a process including when the power failure occurs, saving the user data and the control information stored in the cache memory into the nonvolatile memory, when the power failure recovers, restoring the data stored in the nonvolatile memory into the cache memory, and erasing the data stored in the nonvolatile memory after restoring the data into the cache memory and when another power failure occurs during erasing the data stored in the nonvolatile memory, erasing the control information stored in the nonvolatile memory if the control information is remained in the nonvolatile memory and saving, into the nonvolatile memory, the updated control information stored in the cache memory and the user data which has been erased from the nonvolatile memory.