Flash Memory Power-Interruption Detection via Spare Area Counts

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Solution Overview

Problem

Flash memory devices, such as NAND Flash, experience read and write errors due to electronic charge loss in floating gates and unstable power conditions, leading to difficulties in determining if a power-interruption event has occurred.

Innovation Solution

A data storage device with a flash memory and a controller that includes spare areas for storing power-off-reset counts, where a reference count is written during a write process and used to detect power-interruption events by comparing counts across pages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If flash memory uses floating gates to store data, then data storage capability is improved, but electronic charge loss occurs leading to read and write errors

Engineering Contradiction:

Improvedata storage capabilityVSAvoidread and write error rate

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

The patent applies preliminary action by writing a reference power-off-reset count into spare areas of pages before power-interruption events can occur. This reference count serves as a baseline for later comparison, enabling the system to detect power-interruption events by comparing current page counts against the stored reference. The reference count is updated during normal write operations, ensuring the system is prepared to detect anomalies when power interruptions occur.

Inventive Principle:

Principle #10Preliminary action

2Reliability

If power-interruption detection is implemented using power-off-reset counts, then reliability is improved, but device complexity increases due to additional counting and comparison mechanisms

Engineering Contradiction:

Improvepower-interruption detection accuracyVSAvoidcounting and comparison mechanism complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the power-interruption detection function with the existing flash memory page structure by utilizing spare areas that are already present in the memory architecture. Instead of adding separate detection hardware or complex counting mechanisms, the system combines the reference count storage with the existing page layout, thereby improving reliability while minimizing the increase in device complexity.

Inventive Principle:

Principle #5Merging (Combining)

3Measurement precision

If reference power-off-reset count is written during write process, then detection accuracy is improved, but write time increases due to additional writing operations

Engineering Contradiction:

Improvepower-interruption detection accuracyVSAvoidwrite process time

Core Design Contradiction:

Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies partial action by writing the reference power-off-reset count only into spare areas of pages that undergo write processes, rather than requiring all pages to be rewritten or requiring separate detection operations. This selective approach maintains detection accuracy for affected pages while minimizing the overall time penalty by avoiding unnecessary write operations on pages that do not require updates.

Inventive Principle:

Principle #16Partial or excessive action

Data Source

PatentUS9563249B2Data storage device and power-interruption detection method

Publication Date: 2017.02.07 SILICON MOTION INC

AI summary

A data storage device includes a flash memory and a controller device. The flash memory includes a plurality of pages, wherein each of the pages includes a spare area, and each of the spare areas stores a power-off-reset count. The controller device determines whether the first page has been through a power-interruption event according to the power-off-reset counts stored in the spare areas.