Flash Memory Programming Voltage Control via Pre-Charge and Pumping
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Flash memory devices require specific voltages for programming and erasing operations, leading to high power consumption and operational inefficiencies due to the need for voltage generation circuits.
Innovation Solution
The implementation of a flash memory apparatus with pre-charge voltage transmitters and pumping capacitors to generate programming and erasing control voltages, reducing external power supply voltage requirements and enhancing voltage range capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a voltage generation circuit is used to provide programming and erasing voltages, then the flash memory can perform programming and erasing operations, but the power consumption increases
Solution Approach 1:
The patent applies preliminary action by pre-charging the control gate to a specific voltage level before the actual programming or erasing operation. This pre-charge phase prepares the control gate in advance, reducing the voltage swing required during the main operation and thereby lowering the overall power consumption while maintaining reliable programming and erasing functionality
2Reliability
If a voltage generation circuit is implemented, then programming and erasing operations can be performed, but the device complexity increases
Solution Approach 1:
The patent extracts the voltage generation function from a complex dedicated voltage generation circuit and implements it using simpler existing components such as charge pumps and pre-charge circuits that are already present in the flash memory device. This approach maintains the required programming and erasing operation capability while significantly reducing the additional device complexity that would result from a full voltage generation circuit
Solution Approach 2:
The patent applies universality by designing the voltage control mechanism to serve multiple functions: it provides pre-charging for control gates during programming, supports erasing operations, and can be adapted for different voltage requirements. This multi-functional approach eliminates the need for separate dedicated circuits for each operation, thereby reducing overall device complexity while maintaining full operational capability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution lowers power consumption and expands the range of operational voltages, enabling efficient data programming and erasing operations while reducing external power supply demands.
Implementation Method 1
the pumping capacitor is coupled between the control end point of each of the memory cells and a pumping voltage. The pumping voltage is applied to the pumping capacitor during a second period of time, and generates the programming control voltage for programming at the control end points of the memory cells
Implementation Method 2
The pre-charge voltage transmitter is coupled to the control end point of each of the memory cells. The pre-charge voltage transmitter applies the pre-charge voltage to the control end point of the corresponding memory cell according to a pre-charge enable signal during a first period of time
Data Source
AI summary
A flash memory apparatus is provided. The flash memory apparatus includes a plurality of memory cells and a plurality of programming voltage control generators. Each of the memory cells receives a programming control voltage through a control end thereof, and executes data programming operation according to the programming control voltages. Each of the programming voltage control generators includes a pre-charge voltage transmitter and a pumping capacitor. The pre-charge voltage transmitter provides pre-charge voltage to the end of each of the corresponding memory cells according to pre-charge enable signal during a first period. A pumping voltage is provided to the pumping capacitor during a second period, and the programming control voltage is generated at the control end of each of the memory cells.