Flash Memory Pre-Programming for OS Data Reliability During SMT

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Solution Overview

Problem

The reliability of operating system (OS) data stored in flash memory is deteriorated due to the high-temperature surface mount technology (SMT) process, leading to changes in threshold voltage distributions and increased probability of error bits.

Innovation Solution

A method is employed to reduce lateral charge loss in flash memory cells by applying a pre-program voltage to word lines before the SMT process, followed by multi-bit programming to increase threshold voltages and shape program states using a state shaping encoder, thereby reducing the probability of error bits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the flash memory undergoes the SMT process, then the storage device can be mounted on a printed circuit board, but the threshold voltage distribution of memory cells changes and reliability of OS data deteriorates

Engineering Contradiction:
Improvemounting capabilityVSAvoidOS data reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies preliminary action by performing a pre-program operation before the SMT process to increase threshold voltages of memory cells in advance. This pre-program step creates a voltage buffer that compensates for the expected threshold voltage reduction during high-temperature SMT processing, ensuring data reliability is maintained after mounting.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements preliminary anti-action by applying a pre-program voltage that increases threshold voltages before the harmful SMT process occurs. This counteracts the anticipated threshold voltage reduction and lateral charge loss during SMT, preventing reliability degradation before it happens.

Inventive Principle:
Principle #9Preliminary anti-action

2Reliability

If a pre-program voltage is applied to increase threshold voltages, then lateral charge loss is reduced, but additional programming operations are required

Engineering Contradiction:
Improvedata reliabilityVSAvoidprogramming operations
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies partial action by performing pre-programming only on specific memory blocks that will store OS data before SMT processing, rather than all memory blocks. This selective approach reduces the number of additional programming operations while still providing the necessary reliability protection for critical data.

Inventive Principle:
Principle #16Partial or excessive action

3Quantity of substance

If multi-bit programming is performed to store more data, then storage capacity increases, but the probability of error bits increases due to lateral charge loss

Engineering Contradiction:
Improvestorage capacityVSAvoiderror bit probability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies preliminary action by increasing threshold voltages through pre-programming before multi-bit programming of OS data. This creates a voltage margin that protects against lateral charge loss during SMT, enabling reliable multi-bit storage even under high-temperature conditions.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the threshold voltage parameter by applying pre-program voltages that shift the voltage distribution to higher values. This parameter change creates sufficient separation between programmed and erased states, reducing error bit probability in multi-bit memory cells during and after SMT processing.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12412633B2Flash memory for reducing reliability degradation of OS data due to SMT process
Publication Date: 2025.09.09 SAMSUNG ELECTRONICS CO LTD
  • US12412633B2 patent drawing
  • US12412633B2 patent drawing
  • US12412633B2 patent drawing

AI summary

The present disclosure provides apparatuses and methods for operating a flash memory for programming operating system (OS) data before an surface mount technology (SMT) process. In some embodiments, the method includes erasing a plurality of memory cells in a memory block, reducing a lateral charge loss of the plurality of memory cells due to high temperature degradation during the SMT process by applying a pre-program voltage to word lines coupled to the memory block, and performing multi-bit programming of the OS data in the plurality of memory cells, prior to performing the SMT process. The applying of the pre-program voltage causes threshold voltages of the plurality of memory cells to increase.