Flash Memory Programming Level Determination via Common Line Current
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Solution Overview
Problem
Existing flash memory systems face challenges in efficiently and reliably determining the number of bits stored per cell, often requiring additional flags or indicators that increase complexity, cost, and may not be reliable.
Innovation Solution
The method involves generating a representative current from bit line currents of a page of flash memory cells and comparing it with a predetermined reference current to determine the number of states written per cell, using a current mirror to provide a mirror current proportional to the bit line currents, which is then compared with reference currents to identify the programming level.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a separate flag or indicator is used to indicate the number of bits per page, then the programming level can be determined, but this requires valuable space, adds to cost and complexity, and may require additional read and write steps
Solution Approach 1:
The patent extracts the programming level information directly from the functional characteristics of the memory cells themselves, rather than using separate external indicators. By measuring the combined cell current that naturally varies with programming level, the system eliminates the need for separate flag structures, reducing space requirements and device complexity while maintaining accurate programming level determination
Solution Approach 2:
The memory cells themselves provide the information needed to determine their programming level through their inherent electrical characteristics. The combined cell current naturally reflects the programming state, allowing the system to self-determine programming level without requiring external flags or additional storage elements, thereby reducing overall system complexity
2Measurement precision
If a separate flag or indicator is used to indicate the number of bits per page, then the programming level can be determined, but additional read and write steps are required
Solution Approach 1:
The patent merges the programming level determination function with the existing read operation. By measuring the combined cell current during a normal read operation, the system simultaneously retrieves data and determines programming level without requiring separate read steps, thereby eliminating time loss while maintaining accurate measurement
3Productivity
If multiple charge storage elements are read or programmed in parallel to improve performance, then read and program speed increases, but determining the programming level becomes more complex
Solution Approach 1:
The patent creates a universal measurement approach that works regardless of how many cells are read or programmed in parallel. By measuring the combined current through multiple cells connected to a common bit line, the system determines the average programming level for the entire group, making the solution applicable to any parallel operation size without increasing complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for reliable determination of the number of bits per cell without external indicators, reducing complexity and cost, and enabling faster data processing by eliminating the need for additional read and write steps.
Implementation Method 1
A current mirror may be used to generate a mirror current that is a small fraction of the combined current, and this mirror current may be compared with one or more predetermined currents that correspond to different program levels.
Data Source
AI summary
In a nonvolatile memory array that stores randomized data, the program level—the number of states per cell stored in a population of memory cells—is determined from the total current passing through the population of memory cells under read conditions, as observed on a common line, for example a source line in NAND flash memory.