Flash Memory Program Method Skipping Verify Reads
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Solution Overview
Problem
Conventional non-volatile semiconductor memory devices face performance limitations due to the time-consuming pass/fail check operation, which impedes the improvement of program speed in flash memory devices.
Innovation Solution
A program method for flash memory devices that selectively performs a pass/fail check operation based on a program loop number, allowing for skipping of the check until a predetermined loop number is reached, thereby reducing the time required for program operations by including only program and verify read intervals within initial loops and adding a judging interval in subsequent loops.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a pass/fail check operation is performed after every program operation, then the reliability of data programming is improved, but the program speed deteriorates
Solution Approach 1:
The patent applies the skipping principle by selectively omitting the pass/fail check operation in certain program loops. Specifically, when the program loop counter indicates an initial programming phase, the verify read operation is skipped to accelerate programming speed. The check is restored in subsequent loops to ensure reliability, thus dynamically adjusting the verification frequency based on programming progress.
Solution Approach 2:
The patent implements periodic action by establishing a pattern where pass/fail checks are performed periodically rather than continuously. The verify read operation is executed in alternating program loops - skipped in initial loops and performed in subsequent loops. This periodic verification approach balances speed improvement with reliability maintenance.
2Measurement precision
If pass/fail check operations are performed in every program loop, then the accuracy of programming verification is improved, but the time required for program operations increases
Solution Approach 1:
The patent applies skipping by eliminating the verify read operation during initial program loops when the program loop counter indicates the first few programming cycles. This reduces the total verification time while maintaining sufficient accuracy through subsequent verification operations in later loops.
Solution Approach 2:
The patent implements partial action by performing verification only in certain program loops rather than all loops. The verify read operation is selectively applied based on the program loop counter state, providing sufficient verification accuracy for the final programming result without the excessive time cost of continuous verification throughout all programming cycles.
Data Source
AI summary
A method for programming a flash memory device comprising programming memory cells via repetition of program loops, a first of the program loops including a program execution interval and a verify read interval, a second of the program loops including the program execution interval, the verify read interval, and a judging interval. Also disclosed is a flash memory device comprising a memory cell array having memory cells arranged in rows and columns, a read/program circuit configured to perform program and read operations to the memory cell array, and a control logic circuit configured to control the read/program circuit so as to perform a judging operation according to a program loop number.