Flash Memory Program Verify Offset Adaptation
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Solution Overview
Problem
As NAND flash technology advances to higher data densities, managing bit error rates in solid-state drives (SSDs) becomes increasingly complex, especially with multi-level, triple-level, and quad-level cells, requiring effective methods to ensure reliable operation and error correction.
Innovation Solution
The method involves adjusting program verify offsets for flash memory cells by incrementing or decrementing them in an iterative process based on error counts, using binary data coding to distribute errors evenly across pages, thereby facilitating improved error correction and SSD reliability, even with limited power and processing resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If program verify offsets are adjusted iteratively based on error counts, then error distribution across pages is balanced, but controller complexity increases
Solution Approach 1:
The patent implements feedback by monitoring error counts from read operations and using this information to iteratively adjust program verify offsets. The controller reads data, counts errors in each state, compares error counts against thresholds, and adjusts offsets accordingly to balance error distribution across pages, thereby improving error correction efficiency without requiring complex external systems
Solution Approach 2:
The program verify offsets are made dynamic rather than static, allowing them to be adjusted iteratively based on observed error patterns. The controller dynamically modifies offsets for different states (S0, S1, S2, S3) based on real-time error count feedback, enabling adaptation to changing memory characteristics while maintaining manageable controller complexity through systematic adjustment rules
2Reliability
If iterative adjustment of program verify offsets is performed, then SSD reliability is enhanced, but processing time increases
Solution Approach 1:
The patent employs periodic action by performing iterative offset adjustments at scheduled intervals rather than continuously. The controller executes read operations to gather error data, processes the error counts, adjusts offsets when thresholds are exceeded, and then waits for the next adjustment cycle. This periodic approach balances reliability improvement with acceptable processing time by avoiding constant adjustments
Solution Approach 2:
The controller applies partial action by adjusting only those program verify offsets that exceed error count thresholds, rather than recalibrating all offsets in every iteration. This selective adjustment reduces processing time while still achieving the goal of balancing error distribution across pages, as only the most problematic states require correction at any given time
Data Source
AI summary
Disclosed is a system and method for providing program verify adaptation for flash memory. The method includes performing an adjustment iteration, which includes accessing error counts for respective N states of a plurality of memory cells, applying a weighting to the error counts based on a binary data coding for the N states, determining a state Smin of the N states having a minimum error count Emin from the error counts, determining a state Smax of the N states having a maximum error count Emax from the error counts, determining a difference between the Emax and the Emin satisfies an error count threshold, and adjusting, by a predefined value, a respective program verify offset of a lowest state from Smin and Smax, and of each state between Smin and Smax in the N states, wherein the adjusting is a decrement when Smin is less than Smax and an increment otherwise.