Flash Memory Program Window Adjustment for Endurance
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Solution Overview
Problem
Flash memory cells experience a reduction in their ability to be erased to a specific negative voltage due to electron traps after multiple erase/program cycles, leading to a smaller programming window and limited program states in multilevel cell technology.
Innovation Solution
A method for adjusting the program window by identifying and using reliable threshold voltages to generate a level conversion table, which updates the programming levels and bit patterns to maintain accurate data storage as the memory device cycles, allowing for continuous adjustment of the programming window.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If flash memory cells undergo multiple erase/program cycles, then the memory device can store and retrieve data repeatedly, but the programming window shrinks due to electron traps in the tunnel oxide
Solution Approach 1:
The patent implements dynamic adjustment of programming parameters (such as program voltage levels, pulse widths, and verification thresholds) based on the current cycle count and observed threshold voltage shifts. This allows the system to adapt to the shrinking programming window over time, maintaining reliable data storage even as the memory device endures multiple erase/program cycles
Solution Approach 2:
The system changes operational parameters including program voltage magnitude, program pulse duration, and verification voltage levels as a function of cycle count. By dynamically modifying these parameters, the system compensates for the degradation of the programming window, allowing the memory device to maintain its functionality throughout its intended lifespan
2Reliability
If the programming window is reduced due to cycling, then fewer program states are available in MLC technology, but the memory device needs to maintain multiple data states
Solution Approach 1:
The system dynamically adjusts the voltage thresholds and margins that define each program state in MLC technology. As the programming window shrinks with cycling, the system recalibrates the boundary voltages between states and adjusts the distribution of threshold voltages within each state, thereby maintaining the required number of distinguishable program states within the reduced window
Solution Approach 2:
The patent implements a dynamic state management system that monitors the current programming window size and adjusts the number and positioning of program states accordingly. This allows the memory device to maintain optimal data storage capacity even as the physical programming window decreases due to electron trap accumulation
Data Source
AI summary
In one or more embodiments, a memory device has an adjustable programming window with a plurality of programmable levels. The programming window is moved to compensate for changes in reliable program and erase thresholds achievable as the memory device experiences factors such as erase/program cycles that change the program window. The initial programming window is determined prior to an initial erase/program cycle. The programming levels are then moved as the programming window changes, such that the plurality of programmable levels still remain within the program window and are tracked with the program window changes.