Flash Memory Programming via Simultaneous Bit Line Voltage Control

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Solution Overview

Problem

The programming speed of multi-level flash memory devices is reduced due to the need for separate program operations for each threshold voltage state, which increases the time required to program cells from an erase state to various programmed states.

Innovation Solution

Applying different voltages between threshold voltage intervals to bit lines during programming operations allows for simultaneous execution of program operations across multiple states, reducing the frequency and time of program operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If separate program operations are performed for each threshold voltage state, then programming accuracy is improved, but programming speed deteriorates

Engineering Contradiction:
Improveprogramming accuracyVSAvoidprogramming speed
Core Design Contradiction:
Manufacturing precisionVSSpeed

Solution Approach 1:

The patent combines multiple separate program operations into a single unified program operation. By applying different voltages to different bit lines simultaneously, the patent merges the programming of multiple threshold voltage states (PV1, PV2, PV3) into one operation, thereby improving programming speed while maintaining programming accuracy through precise voltage control for each state.

Inventive Principle:
Principle #5Merging (Combining)

2Manufacturing precision

If multiple program operations are executed sequentially, then state transition precision is improved, but program operation time increases

Engineering Contradiction:
Improvestate transition precisionVSAvoidprogram operation time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent merges sequential program operations into a simultaneous operation by applying different voltages to different bit lines connected to the same word line. This allows cells to transition to different states (PV1, PV2, PV3) in parallel within a single program operation, reducing program operation time while maintaining state transition precision through differentiated voltage application.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent applies different voltages to different bit lines based on the desired target state of the cells. By assigning specific voltages (Vcc, Vpp1, Vpp2, Vpp3) to different bit lines, the patent creates local quality differences that enable precise control of state transitions for different cell groups simultaneously, thereby reducing overall program operation time without sacrificing precision.

Inventive Principle:
Principle #3Local quality

3Productivity

If different voltages are applied to different bit lines simultaneously, then programming efficiency is improved, but voltage control complexity increases

Engineering Contradiction:
Improveprogramming efficiencyVSAvoidvoltage control complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements local quality by assigning different voltages to different bit lines based on the target state requirements. Each bit line is configured with a specific voltage level (Vcc, Vpp1, Vpp2, Vpp3) corresponding to the desired threshold voltage state, enabling differentiated control for different cell groups while maintaining a relatively simple overall control structure through systematic voltage assignment.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables faster programming by performing multiple state transitions in a single operation, decreasing the overall program operation time and increasing efficiency.

Implementation Method 1

When a program voltage is applied to a control gate through a selected word line, a Fowler-Nordheim (F-N) tunneling phenomenon is produced between a semiconductor substrate and a floating gate and thus electrons flow into the floating gate from the semiconductor substrate to perform a program operation.

Methodology Applied
Scientific EffectFowler-Nordheim tunneling:

Data Source

PatentUS8036039B2Flash memory device and program method thereof
Publication Date: 2011.10.11 SK HYNIX INC
  • US8036039B2 patent drawing
  • US8036039B2 patent drawing
  • US8036039B2 patent drawing

AI summary

A flash memory device includes a memory cell array on which data is stored, and page buffers that are connected to the memory cells through the bit lines and apply one of the first voltage, second voltage or third voltage between the first and second voltage, to the respective bit line when performing the program.