Flash Memory Error Correction Using Programming Parameters
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Solution Overview
Problem
Flash memory devices face challenges in error correction due to the inherent 'flipped' state of information bits during read operations, necessitating improved techniques beyond traditional Error Correction Codes (ECC) to ensure reliable data retrieval.
Innovation Solution
A method and system for error correction in memory devices that involve writing initial data, determining an operational parameter based on the writing process, and subsequently correcting errors in read data using this parameter, which can involve selecting decoders, modes, or bit-probability values to optimize error handling based on the reliability and quality of the writing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional Error Correction Codes (ECC) are used to correct flipped bits in flash memory, then data reliability is improved, but computational resources and processing time are increased
Solution Approach 1:
The patent applies preliminary action by determining an operational parameter during the data writing process that indicates the likelihood of bit flips. This parameter is stored and later used to configure the error correction process, allowing the system to prepare correction strategies in advance rather than using fixed traditional ECC methods for all cases.
Solution Approach 2:
The patent implements dynamics by making the error correction process adaptive based on the operational parameter. Different decoding algorithms, iteration counts, or correction intensities are selected dynamically according to the stored parameter value, allowing the system to optimize computational resources while maintaining data reliability.
2Reliability
If robust error correction methods are applied to all data reads, then data reliability is improved, but processing speed is reduced
Solution Approach 1:
The patent changes parameters by using the operational parameter (such as programming iteration count or verify failure count) to determine the appropriate error correction intensity. When the parameter indicates low error probability, lighter correction methods are used to maintain speed; when high error probability is indicated, more robust correction is applied to ensure reliability.
Solution Approach 2:
The error correction process is made dynamic by selecting different decoding algorithms or adjustment strategies based on the stored operational parameter, allowing the system to adapt processing speed and correction robustness to the actual data quality conditions.
3Speed
If lightweight error correction is used to maintain processing speed, then processing speed is improved, but data reliability deteriorates
Solution Approach 1:
The system performs preliminary assessment by storing operational parameters during writing that indicate data quality. This advance information allows the read operation to select appropriate correction intensity, avoiding both over-correction (wasting speed) and under-correction (compromising reliability).
Solution Approach 2:
The correction parameters are adjusted based on the stored operational parameter value, enabling the system to use lightweight correction only when the data quality indicator suggests it is sufficient, while applying stronger correction when needed to maintain reliability.
4Device complexity
If uniform error correction strategy is applied to all memory operations, then device complexity is reduced, but adaptability to different writing conditions deteriorates
Solution Approach 1:
The patent uses preliminary action by capturing operational characteristics during the writing phase and storing them for later use. This allows the read operation to adapt to the specific conditions under which the data was written without requiring complex real-time analysis.
Solution Approach 2:
The operational parameter acts as an intermediary that carries information about writing conditions from the write operation to the read operation. This intermediary enables adaptation to different writing conditions while keeping the error correction logic itself relatively simple.
Data Source
AI summary
Methods, apparatus and computer readable medium for handling error correction in a memory are disclosed. In some embodiments, first data is written to the memory, and a value(s) of an operational parameter(s) that is a consequence of the writing of the first data is determined. Second data is read from the memory, and the value(s) of the operational parameter(s) may be used when correcting errors in the second data. In some embodiments, the first data is the same as the second data. The presently-disclosed teachings are applicable to any kind of memory including (i) non-volatile memories such as flash memory, magnetic memory and optical storage and (ii) volatile memory such as SRAM or DRAM.