Multi-bit Flash Memory Programming Method for Read Margin Improvement

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Solution Overview

Problem

Conventional multi-bit per cell flash memory experiences read errors due to floating-gate coupling and retention effects, leading to narrow read margins.

Innovation Solution

A method of programming multi-bit per cell non-volatile memory involves reading and reprogramming most-significant-bit pages on neighboring word lines using reference voltages or random data to improve coupling effects and increase read margins, thereby reducing errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multi-bit per cell flash memory stores more bits per cell by programming different charge amounts in the floating gate, then storage capacity increases, but floating-gate coupling effect and retention effect occur leading to narrow read margin and read errors

Engineering Contradiction:
Improvestorage capacityVSAvoidread margin
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies preliminary action by performing a first programming operation on a first word line before reading data from a second word line. This preliminary programming establishes a controlled charge state in the floating gate that compensates for coupling effects, thereby improving read margin reliability when reading multi-bit data from adjacent word lines

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the charge parameter in the floating gate by programming different charge amounts corresponding to different data states (00, 01, 10, 11). This parameter change enables multi-bit storage per cell while the patent simultaneously manages the coupling effect by controlling the charge distribution across adjacent word lines to maintain adequate read margins

Inventive Principle:
Principle #35Parameter changes

2Loss of information

If conventional multi-bit per cell flash memory programs data by storing different charge amounts in the floating gate, then data storage is achieved, but floating-gate coupling effect causes read errors due to narrow read margin

Engineering Contradiction:
Improvedata storageVSAvoidfloating-gate coupling effect
Core Design Contradiction:
Loss of informationVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary anti-action by performing a first programming operation that establishes a compensatory charge state before the read operation. This preliminary action counteracts the harmful coupling effect that would otherwise cause read errors, thereby protecting data integrity during multi-bit reads from adjacent word lines

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The patent converts the harmful floating-gate coupling effect into a beneficial mechanism by using controlled preliminary programming to establish charge states that, when combined with the coupling effect, produce the desired threshold voltage shifts for accurate data reading. The coupling effect is transformed from a source of errors to an aid in achieving precise multi-bit read margins

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS8923071B2Method of programming a multi-bit per cell non-volatile memory
Publication Date: 2014.12.30 YEESTOR MICROELECTRONICS CO LTD
  • US8923071B2 patent drawing
  • US8923071B2 patent drawing
  • US8923071B2 patent drawing

AI summary

A method of programming a multi-bit per cell non-volatile memory is disclosed. In one embodiment, the non-volatile memory is read to obtain a first data of a most-significant-bit (MSB) page on a current word line that succeeds in data reading, wherein the current word line follows a preceding word line on which data reading fails. At least one reference voltage is set. The MSB page on the current word line is secondly programmed with a second data according to the reference voltage, the second data being different from the first data.