Flash Memory Programming Verification Control Circuit
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Solution Overview
Problem
Conventional flash memory programming verification processes are elongated due to latch-up effects, leading to increased programming verification time and energy loss.
Innovation Solution
A programming verification control circuit that includes a first decoder circuit for the word line, a second decoder circuit for the control gate, and a voltage equalizer to manage voltages, allowing high voltages to drop to intermediate levels without introducing additional voltages, thereby preventing latch-up and accelerating discharge.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional programming verification is carried out by reading the memory bit after programming, then the programming verification function is achieved, but the programming verification time is elongated due to latch-up effects requiring voltage changes to wait for stabilization
Solution Approach 1:
The voltage equalizer pre-charges the control gate to an intermediate voltage level before the actual programming operation. This preliminary action prepares the voltage state in advance, so that when programming completes, the voltage transition to verification levels is faster and avoids latch-up delays, as the gate is already partially charged and ready for the next voltage state.
Solution Approach 2:
An intermediate voltage level is introduced as a mediator between the programming voltage (8.6V) and the verification voltage (0V). The voltage equalizer uses this intermediate state to bridge the transition, allowing the control gate to discharge through a controlled path that avoids the latch-up effect, thereby reducing the time required for voltage stabilization during verification.
2Reliability
If the voltage on the control gate is decreased to 0 V and the voltage on the word line is increased to 4.5 V after programming completion, then programming verification can be enabled, but the voltage change takes a period of time tf due to latch-up effects
Solution Approach 1:
The control gate is pre-charged to an intermediate voltage during the programming phase through the voltage equalizer. This preliminary charging action reduces the voltage differential that needs to be discharged during verification, thereby shortening the discharge time tf and enabling faster transition to verification state without compromising reliability.
Solution Approach 2:
The voltage transition parameters are changed by introducing an intermediate voltage level and using the voltage equalizer to control the discharge rate. Instead of a direct sharp transition from 8.6V to 0V that causes latch-up, the voltage changes in controlled steps, modifying the transition parameters to avoid harmful effects and reduce duration.
3Productivity
If additional voltage changes are performed to allow the next programming cycle to start, then continuous programming operation is enabled, but the programming time is further elongated due to latch-up effects
Solution Approach 1:
The voltage equalizer maintains continuous control over the control gate voltage throughout programming and verification cycles. By keeping the voltage management action continuous and controlled rather than discrete and reactive, the system avoids repeated latch-up events and maintains faster transition speeds, enabling continuous programming operation with reduced idle time between cycles.
Solution Approach 2:
Before each programming cycle begins, the voltage equalizer ensures the control gate is properly charged to the required voltage level. This preliminary preparation eliminates voltage stabilization delays at the start of each cycle, allowing continuous programming operations to proceed without additional time losses from latch-up effects during voltage transitions.
4Reliability
If conventional voltage management is used during programming verification, then the verification process is completed, but energy loss increases due to uncontrolled voltage transitions and latch-up effects
Solution Approach 1:
The voltage equalizer acts as an intermediary energy management device that controls voltage transitions through an intermediate charge state. By storing and releasing energy in a controlled manner through the equalizer's capacitance, the system avoids energy waste from uncontrolled discharge and latch-up events, reducing overall energy loss while completing verification reliably.
Solution Approach 2:
The voltage transition parameters are modified to include controlled discharge rates and intermediate voltage levels. This changes the energy dissipation characteristics from sharp, high-loss transitions to gradual, controlled transitions, reducing energy loss during verification while maintaining reliable operation completion.
Data Source
AI summary
A programming verification control circuit is disclosed, including: a first decoder circuit for decoding a word line of a memory bit; a first drive circuit for receiving a first voltage and providing the first voltage to the word line of the memory bit based on a decoding result of the first decoder circuit; a second decoder circuit for decoding a control gate of the memory bit; a second drive circuit for receiving a second voltage and providing the second voltage to the control gate of the first memory bit based on a decoding result of the second decoder circuit; and a voltage equalizer for receiving the first voltage, the second voltage and a first enable signal and, in event of the first enable signal being valid, controlling the first voltage and the second voltage to be conducted. A method for controlling the programming verification control circuit is also disclosed.