Flash Memory Programming Voltage Adjustment Based on Cycle History

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Solution Overview

Problem

Flash memory devices face inefficiencies in programming and erasing operations due to increasing threshold voltages over program/erase cycles, leading to over-programming or over-erasing issues, as the number of cycles affects the required voltages and pulse counts, making it difficult to maintain efficient operations throughout the device's life-cycle.

Innovation Solution

The implementation of control logic in NAND flash memory devices that monitors pulse counts and program/erase cycles, adjusting the starting voltages accordingly to optimize programming and erasing processes, ensuring efficient operation by adapting to the device's history of cycles.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If fixed programming voltages are used throughout the device life-cycle, then the programming process is simple to implement, but over-programming or over-erasing occurs as threshold voltages change with program/erase cycles

Engineering Contradiction:
Improveprogramming process simplicityVSAvoidprogramming accuracy
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies dynamics by making the programming voltage adjustable rather than fixed. The control logic dynamically changes the programming voltage based on the number of program/erase cycles detected, transitioning from a static voltage approach to a dynamic one that adapts to device aging and threshold voltage shifts.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the voltage parameter based on program/erase cycle count. The control logic detects the cycle count and adjusts the programming voltage accordingly, modifying the electrical parameter to compensate for threshold voltage drift and prevent over-programming or over-erasing throughout the device life-cycle.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the programming voltage is adjusted to compensate for threshold voltage changes, then programming accuracy is maintained, but the device complexity increases due to additional control logic

Engineering Contradiction:
Improveprogramming accuracyVSAvoidcontrol logic complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements feedback by having the control logic detect the number of program/erase cycles and use this information to adjust subsequent programming voltages. This closed-loop feedback mechanism ensures programming accuracy is maintained while the complexity is confined to the control logic rather than the entire device.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The control logic serves itself by automatically detecting program/erase cycle counts and autonomously adjusting programming voltages without external intervention. This self-service capability maintains programming accuracy while minimizing the need for additional complex external control circuitry.

Inventive Principle:
Principle #25Self-service

3Reliability

If higher programming voltages are applied to ensure complete programming, then programming reliability is improved, but over-erasing occurs in cells that should remain unchanged

Engineering Contradiction:
Improveprogramming completenessVSAvoidover-erasing damage
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies local quality by providing different programming voltages to different groups of cells based on their program/erase cycle history. The control logic identifies which cells require programming and applies appropriate voltages, ensuring complete programming of target cells while preventing over-erasing of non-target cells through selective voltage application.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9959931B2Programming a memory device in response to its program history
Publication Date: 2018.05.01 MICRON TECHNOLOGY INC
  • US9959931B2 patent drawing
  • US9959931B2 patent drawing
  • US9959931B2 patent drawing

AI summary

A method includes determining, internal to a memory device, a number of program pulses required to program a sample of memory cells of the memory device during a first programming operation, comparing the determined number of program pulses required to program the sample of memory cells of the memory device to a target number of program pulses, and adjusting a program starting voltage level of one or more program pulses applied to one or more memory cells of the sample of memory cells during a second programming operation subsequent to the first programming operation when the determined number of program pulses required to program the sample of memory cells in the first programming operation is different than the target number so that the number of program pulses applied during the second programming operation tends toward the target number.