Flash Memory Programming Voltage Control
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Solution Overview
Problem
NAND flash memory devices with multi-level cells face reduced memory cell reliability due to narrowed intervals between programmed states, leading to incorrect reading and worsened programming characteristics, as the increment of program voltage decreases the number of program loops increases, thereby worsening programming characteristics.
Innovation Solution
A method and device for programming flash memory devices where the program voltage increments are varied based on threshold voltage distributions of multi-level memory cells, using an Increment Step Pulse Programming (ISPP) method that generates a clock signal and enables signals to adjust the program voltage, reducing the number of program loops and achieving an optimum threshold voltage distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the increment of program voltage is decreased to narrow threshold voltage distributions, then manufacturing precision of threshold voltage distribution is improved, but the number of program loops increases and programming characteristics worsen
Solution Approach 1:
The patent applies dynamics by making the program voltage increment variable rather than fixed. The increment is dynamically adjusted based on the current threshold voltage distribution width and programming progress, allowing the system to optimize between distribution narrowness and programming speed at different stages.
Solution Approach 2:
The patent changes the parameter of program voltage increment from a constant value to a variable parameter that is adjusted based on threshold voltage distribution characteristics. This allows the system to adapt the increment size to achieve optimal programming performance.
2Manufacturing precision
If the increment of program voltage is decreased to achieve accurate threshold voltage control, then manufacturing precision is improved, but program loops increase and reliability may be affected
Solution Approach 1:
The system dynamically adjusts the program voltage increment based on real-time feedback about threshold voltage distribution width. When distribution is wide, larger increments are used; when narrow, smaller increments are applied, ensuring both accuracy and reliability.
Solution Approach 2:
The patent implements feedback by monitoring the threshold voltage distribution width during programming and using this information to adjust subsequent program voltage increments, creating a closed-loop control system that maintains both precision and reliability.
3Quantity of substance
If multi-level cells are used to increase data storage capacity, then quantity of data storage is improved, but intervals between programmed states narrow causing reading errors
Solution Approach 1:
The patent changes the parameter of program voltage increment to be variable, allowing larger increments to be used with multi-level cells to maintain adequate intervals between programmed states while still achieving high storage capacity.
Solution Approach 2:
The patent applies local quality by using different program voltage increments for different data states in multi-level cells. Each state transition can use an optimized increment size appropriate for maintaining that specific state's separation from others.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method reduces the number of program loops and narrows the threshold voltage distributions of programmed cells, increasing the reliability of cell operations by widening the intervals between programmed states and improving programming characteristics.
Implementation Method 1
A charge pump unit generates the program voltage, in response to the pumping clock signal
Implementation Method 2
In flash memory devices, data programming and erasing may be achieved using a tunneling phenomenon
Data Source
AI summary
Provided is a method of programming the flash memory device including setting increments of program voltages according to data states expressed as threshold voltage distributions of multi-level memory cells. An Increment Step Pulse Programming (ISPP) clock signal corresponds to a loop clock signal and the increments of the program voltages and is generated in response to program pass/fail information. A default level enable signal is generated by performing a counting operation until reaching the increments of the program voltages, in response to the loop clock signal. An additional level enable signal is generated by performing a counting operation until reaching the increments of the program voltages, in response to the ISPP clock signal. The program voltage is increased by 1 increment, in response to the default level enable signal. The program voltage is increased by 2 increments, in response to the additional level enable signal.