Flash Memory PUF Circuit Voltage Control
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Solution Overview
Problem
Existing flash memory-based PUF circuits face challenges in endurance characteristics and complexity due to the need for incremental step pulse programming (ISPP) methods, which complicate the operation and performance of flash memory devices.
Innovation Solution
A method and apparatus that control the operation of flash memory by adjusting program, erase, and read voltage conditions in response to a PUF mode selection signal, allowing flash memory to function as a PUF circuit without requiring the ISPP method, by setting voltage conditions to lower or shorter levels than common flash memory, using the average or median value of threshold voltage distributions for read reference voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ISPP method is used to implement flash memory-based PUF circuit, then reliability of PUF circuit is improved, but device complexity increases
Solution Approach 1:
The patent extracts the essential function of creating a meta-stable state from the complex ISPP method. Instead of using the multi-step ISPP programming process, the invention directly applies a single program command to create the required meta-stable state in flash memory cells, thereby maintaining PUF reliability while eliminating operational complexity
Solution Approach 2:
The patent inverts the conventional approach by not using program and erase operations to create the meta-stable state, but instead by directly programming cells to a specific threshold voltage distribution that naturally creates meta-stability during read operations. This reversal eliminates the need for complex ISPP control while achieving the same PUF effect
2Manufacturing precision
If ISPP method is used to implement flash memory-based PUF circuit, then manufacturing precision is improved, but ease of operation deteriorates
Solution Approach 1:
The patent changes the operational parameters from multi-step voltage sequencing in ISPP to a single program command with specific voltage conditions. By adjusting the program voltage and pulse width to create a specific threshold voltage distribution, the invention achieves precise threshold voltage control without the operational complexity of ISPP method
3Reliability
If program and erase operations are used to create PUF circuit, then reliability is improved, but endurance characteristics deteriorate
Solution Approach 1:
The patent applies partial programming action by programming flash memory cells to a specific threshold voltage distribution that creates meta-stable states without completing full program-erase cycles. This partial action approach maintains PUF reliability by establishing the required voltage distributions while significantly reducing wear on the flash memory cells compared to complete program-erase operations
Data Source
AI summary
A method and apparatus for controlling the operation of flash memory are provided. The apparatus for controlling the operation of flash memory includes a control unit and a voltage adjustment unit. The control unit outputs a control signal adapted to change one or more of the program, erase and read voltage conditions for the flash memory to the voltage adjustment unit in response to the input of a PUF mode selection signal. The voltage adjustment unit changes the one or more of the program, erase and read voltage conditions for the flash memory in response to the input of the control signal.


