Flash Memory Controller with Punctured Convolutional Error Coding

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Solution Overview

Problem

Existing flash memory systems face challenges in effectively correcting errors beyond a certain limit, leading to uncorrectable data issues that can be catastrophic, especially when word lines fail, due to limitations in error correction codes.

Innovation Solution

Implementing a rate-compatible convolutional code with adjustable code rates using puncturing to increase error correction redundancy dynamically, combining an outer block code with an inner rate-compatible convolutional code to enhance data integrity and reduce storage requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional error correction codes are used, then data can be corrected within a certain error limit, but errors beyond this limit remain uncorrectable and can be catastrophic

Engineering Contradiction:
Improveerror correction capabilityVSAvoiderror correction code structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The error correction system is divided into two independent segments: an outer block code (e.g., BCH or Reed-Solomon) and an inner convolutional code. Each segment handles different aspects of error correction, allowing the system to correct errors beyond the capability of either code alone while maintaining manageable complexity through modular design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent combines two different error correction coding schemes (block code and convolutional code) into a composite error correction system. This composite approach leverages the strengths of both coding types to achieve superior error correction performance that neither code could achieve independently.

Inventive Principle:
Principle #40Composite materials

2Reliability

If error correction redundancy is increased to correct more errors, then data integrity improves, but storage capacity decreases

Engineering Contradiction:
Improvedata integrityVSAvoidstorage capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The system dynamically adjusts the amount of redundancy allocated to error correction based on actual error conditions and data importance. The dual-code structure allows flexible allocation of redundancy resources, enabling the system to maintain high data integrity when needed while preserving maximum storage capacity under normal conditions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs rate-compatible convolutional coding where the code rate can be changed by puncturing (removing) certain bits from the encoded stream. This allows the system to adjust the redundancy level dynamically, achieving high error correction capability when required while maintaining efficient storage utilization during normal operation.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If fixed error correction codes are used, then implementation is simple, but the system cannot adapt to varying data values and reliability requirements

Engineering Contradiction:
Improveimplementation simplicityVSAvoidflexibility in error correction
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The dual-code error correction system serves multiple functions: it can operate in different modes (block code only, convolutional code only, or both together), adapt to different error conditions, and handle various data types with different reliability requirements. This multi-functional design maintains implementation simplicity while providing high adaptability through the modular structure.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP2229680B1Memory controller supporting rate compatible punctured codes
Publication Date: 2013.02.13 MICRON TECHNOLOGY INC
  • EP2229680B1 patent drawingFigure 1
  • EP2229680B1 patent drawingFigure 2
  • EP2229680B1 patent drawingFigure 3

AI summary

Apparatus and methods store data in a non-volatile solid state memory device (100) according to a rate-compatible code, such as a rate-compatible convolutional code (RPCC). An example of such a memory device (100) is a flash memory device (100). Data can initially be block encoded (112) for error correction and detection. The block-coded data can be further convolutionally encoded (114). Convolutional-coded data can be punctured (116) and stored in the memory device (100). The puncturing decreases the amount of memory used to store the data. Depending on conditions, the amount of puncturing can vary from no puncturing to a relatively high amount of puncturing to vary the amount of additional error correction provided and memory used. The punctured data can be decoded (120, 122) when data is to be read from the memory device (100).