Flash Memory Super Blocks With RAID Parity for Read Error Recovery
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Solution Overview
Problem
Flash memory devices, such as NAND Flash, face data read errors due to the nature of their storage units, where the current encoding and decoding processes affect performance, and existing solutions do not adequately address these issues.
Innovation Solution
A data storage device and method that organizes flash memory into super blocks with a data area and a RAID parity area, where data is encoded to generate parity codes, temporarily stored in RAM, and written sequentially into the data area and parity area, utilizing a predetermined writing order to improve data integrity and readability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If encoding data is stored into flash memory to correct read errors, then data reliability is improved, but writing performance deteriorates due to the storage method of encoded data
Solution Approach 1:
The flash memory is divided into data areas and RAID parity areas, with pages organized into super blocks. Data pages and parity pages are segmented and stored in separate regions, allowing independent management and optimization of write operations for each type of data.
Solution Approach 2:
Parity pages are pre-formed and stored in the RAID parity area before actual data writing occurs. The controller prepares the parity information in advance and stores it in dedicated pages, so that when data needs to be written, the parity structure is already in place, improving write efficiency.
2Reliability
If encoded data is stored into flash memory, then error correction capability is improved, but the complexity of the storage system increases
Solution Approach 1:
The flash memory system performs self-error-correction using internally stored parity information. The controller uses the pre-stored parity pages in the RAID parity area to automatically correct read errors without requiring external intervention or complex external error correction mechanisms.
Solution Approach 2:
The error correction functionality is merged into the existing flash memory structure by integrating RAID parity storage with the standard data storage pages. The parity information is combined with data pages in the same super block structure, creating a unified storage system that provides both storage and error correction functions.
Data Source
AI summary
A data storage device includes a flash memory and a controller. The flash memory includes a plurality of chips, each of the chips includes a plurality of pages, the pages are arranged to assemble into a super block, the pages of the super block are numbered 0˜X from top to bottom of the super block, the pages with number 0˜Y−1 constitute a data area, and the pages with numbers Y˜X constitute a RAID parity area. The controller corrects data of the data area according to data of the RAID parity area when the data in the data area cannot be successfully read.