Flash Memory Read Count Tracking for UECC and Relocation Control

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Solution Overview

Problem

Current methods of recording read counts in flash memory lead to inefficient processing and shortened lifespan due to frequent triggering of Uncorrectable Error Correction Code (UECC) operations and data relocation, as they aggregate read counts for virtual management units, leading to uneven wear across physical blocks.

Innovation Solution

A memory control method that records read counts for both virtual management units and individual physical blocks within them, designating the maximum read count for the physical block with the highest count as the unit's read count, and performs data relocation or UECC checks based on this threshold.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If read counts are aggregated at the virtual block level, then buffer memory usage is reduced, but read disturbance detection precision deteriorates

Engineering Contradiction:
Improvebuffer memory usageVSAvoidread disturbance detection precision
Core Design Contradiction:
Quantity of substanceVSMeasurement precision

Solution Approach 1:

The patent segments the read count recording by maintaining separate counters for each physical block within a virtual block, rather than aggregating them into a single virtual block-level counter. This segmentation allows precise tracking of individual physical block read counts while using buffer memory efficiently through selective recording based on thresholds.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If read counts are recorded individually for each physical block, then read disturbance detection precision is improved, but buffer memory usage increases

Engineering Contradiction:
Improveread disturbance detection precisionVSAvoidbuffer memory usage
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent applies local quality by recording detailed read count information only for physical blocks that meet specific criteria (e.g., when read count reaches a threshold or when the block is frequently accessed), while using aggregated or simplified recording for other blocks. This selective approach maintains precision where needed while conserving buffer memory resources.

Inventive Principle:
Principle #3Local quality

3Reliability

If virtual management unit scanning is triggered frequently, then data integrity is maintained, but processing efficiency deteriorates

Engineering Contradiction:
Improvedata integrityVSAvoidprocessing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements feedback mechanisms by continuously monitoring physical block read counts and comparing them against predefined thresholds. Scanning or relocation operations are triggered only when the feedback from read count monitoring indicates that a threshold has been exceeded, thereby maintaining data integrity while avoiding unnecessary operations that would reduce processing efficiency.

Inventive Principle:
Principle #23Feedback

4Reliability

If data relocation is performed frequently, then read disturbance is prevented, but flash memory lifespan is shortened

Engineering Contradiction:
Improveread disturbance preventionVSAvoidflash memory lifespan
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent applies preliminary anti-action by proactively identifying physical blocks approaching read disturbance thresholds through continuous read count monitoring. Data relocation is performed preemptively when read counts approach critical levels, preventing read disturbance from occurring in the first place and thereby extending flash memory lifespan by avoiding the need for corrective operations.

Inventive Principle:
Principle #9Preliminary anti-action

Data Source

PatentUS20250348230A1Memory control method, memory storage device and memory control circuit unit
Publication Date: 2025.11.13 HEFEI KAIMENG TECHNOLOGY CO LTD
  • US20250348230A1 patent drawing
  • US20250348230A1 patent drawing
  • US20250348230A1 patent drawing

AI summary

Disclosed are a memory control method, a memory storage device, and a memory control circuit unit. The method is used in a memory storage device including a rewritable non-volatile memory module. The rewritable non-volatile memory module includes virtual management units, each virtual management unit includes physical blocks. The method includes acquiring and utilizing an array to record the read count for virtual management units and the read count for each physical block within each virtual management unit; designating the maximum read count for the physical block with the highest read count within the first virtual management unit as the read count for the first virtual management unit; and, if the read count for the first virtual management unit is greater than or equal to a read count threshold, performing data relocation on the first virtual management unit, or, checking whether the first virtual management unit is unable error correcting code.