Flash Memory Read Voltage Adaptation via Program Order Mapping

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Solution Overview

Problem

Flash memory devices face challenges in maintaining data reliability due to changes in threshold voltage distributions over time, leading to read errors and reduced reliability, especially in multi-level cell systems where slight voltage changes can cause significant errors.

Innovation Solution

A method is introduced to manage program order information using a program order stamp (POS) and generate mapping tables that adjust read voltage offsets based on sequential voltage levels, allowing for adaptive read voltage determination to maintain data integrity across varying retention times.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If fixed read voltage is used for read operations, then device complexity is reduced, but reliability deteriorates due to threshold voltage drift over time

Engineering Contradiction:
Improvedata retentionVSAvoidread voltage control
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-calculating and storing read voltage offset values in mapping tables before actual read operations occur. The mapping tables are generated during manufacturing or initialization, containing pre-determined voltage offsets for different retention times and program orders. When a read operation is needed, the system simply looks up the appropriate offset from the pre-computed table rather than performing complex real-time calculations, thus maintaining high reliability through adaptive voltage adjustment while keeping the operational complexity low.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces mapping tables as an intermediary between the program order information and the read voltage determination. The mapping tables serve as a pre-computed lookup structure that translates program order stamps into appropriate read voltage offsets. This intermediary layer eliminates the need for complex real-time voltage calculation algorithms during read operations, providing a simple yet effective mechanism to maintain data reliability across different retention periods and program sequences.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If read voltage is adjusted dynamically based on retention time, then reliability is improved, but device complexity increases due to additional control mechanisms

Engineering Contradiction:
Improveread accuracyVSAvoidvoltage adjustment control
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent resolves this contradiction by performing the complex voltage adjustment calculations in advance during manufacturing or initialization, storing the results in mapping tables. During actual read operations, the system only needs to perform a simple table lookup based on the program order stamp and retention time, rather than executing complex real-time voltage adjustment algorithms. This approach maintains high read accuracy while minimizing the operational complexity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The mapping tables are designed to be self-populated through automated processes during manufacturing or initialization, eliminating the need for manual configuration or complex runtime control mechanisms. The system automatically generates the appropriate voltage offsets based on characterized performance data, and this information is then stored in the mapping tables for automatic retrieval during read operations, reducing the burden on the control system.

Inventive Principle:
Principle #25Self-service

3Measurement precision

If mapping tables are generated using both increasing and decreasing voltage levels, then measurement precision is improved, but loss of time increases due to additional generation steps

Engineering Contradiction:
Improvevoltage threshold detectionVSAvoidmapping table generation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing the time-consuming dual-directional voltage level scanning during manufacturing or initialization rather than during operational use. The mapping tables are pre-computed with high precision using both increasing and decreasing voltage sequences to accurately capture threshold voltage characteristics. Once generated, these tables are stored and reused for all subsequent read operations, achieving high measurement precision without incurring time penalties during normal operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses copying by creating a static reference copy of the voltage threshold characteristics during manufacturing through the dual-directional scanning process. This reference information is captured in the mapping tables and then copied/retrieved during read operations without requiring repeated measurement. The time-intensive precise measurement is performed once to create the reference, which is then efficiently reused many times.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS9921749B2Memory system and method including determining a read voltage based on program order information and a plurality of mapping tables
Publication Date: 2018.03.20 SAMSUNG ELECTRONICS CO LTD
  • US9921749B2 patent drawing
  • US9921749B2 patent drawing
  • US9921749B2 patent drawing

AI summary

A method of operating a memory system, including a memory device, includes managing program order information of the memory device based on a program order stamp (POS) indicating a relative temporal relationship between program operations of a plurality of memory groups that are included in the memory device. The method includes generating a first mapping table that stores a read voltage offset and an upper POS corresponding to the read voltage offset, by using a plurality of voltage levels that are sequentially decreased or reduced, and generating a second mapping table that stores the read voltage offset and a lower POS corresponding to the read voltage offset, by using a plurality of voltage levels that are sequentially increased. A read voltage for performing a read operation on the memory device is variably determined based on the first and second mapping tables and the program order information.