Flash Memory Cell Recessed Isolation Structure for Current Crowding
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Solution Overview
Problem
The high-voltage operations in flash memory devices lead to deep source/drain implants, causing current crowding at the substrate surface, which affects device performance and efficiency.
Innovation Solution
The formation of flash memory devices on a recessed region of a substrate, with specific patterning and etching processes to create isolated active regions, reducing the depth of source/drain regions and enhancing the coupling ratio between floating and control gates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If deep source/drain implants are used to accommodate high-voltage operations, then device voltage handling capability is improved, but current crowding at the substrate surface worsens
Solution Approach 1:
The patent introduces a recessed region that creates a vertical dimension difference between the active region and surrounding areas. This dimensional change allows source/drain regions to be positioned at different depths, enabling high-voltage operation while distributing current flow more evenly and reducing surface current crowding effects.
Solution Approach 2:
The patent applies different structural characteristics to different regions: the active region contains a recessed structure with specific depth and dimensions, while surrounding regions maintain different characteristics. This local differentiation allows optimized current distribution in the active region while maintaining overall device functionality.
2Productivity
If feature sizes are decreased to increase functional density, then device integration is improved, but device performance deteriorates
Solution Approach 1:
The patent changes the vertical depth parameter of the active region by creating a recessed structure. This parameter change allows the device to maintain small lateral dimensions for high density while achieving sufficient vertical separation to reduce current crowding and maintain performance in high-voltage operations.
Data Source
AI summary
An integrated circuit device includes a substrate, an isolation feature, a memory cell, and a semiconductor device. The substrate has a cell region, a peripheral region, and a transition region between the cell region and the peripheral region. The isolation feature is in the transition region. A top surface of the isolation feature has a first portion and a second portion lower than the first portion, the second portion of the top surface of the isolation feature is between the cell region and the first portion of the top surface of the isolation feature, and a bottom surface of the isolation feature has a step height directly below the second portion of the top surface of the isolation feature. The is memory cell over the cell region of the substrate. The semiconductor device is over the peripheral region of the substrate.