Flash Memory Error Correction Using Hardware-Software Reed-Solomon
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Solution Overview
Problem
Flash memory devices, particularly NAND flash, face premature failure due to limited endurance and high error rates, especially when used in consumer products like digital audio players and mobile phones, where simple error correction techniques like Hamming codes are insufficient to handle the wear and tear, leading to increased costs and product reliability issues.
Innovation Solution
A data processing device with an integrated circuit and error correction means that implements a hardware-based coding unit for extended error correction algorithms, capable of detecting and correcting more errors than simple error correction schemes, by processing data written to and read from rewritable memory, using a combination of hardware for coding and software for error correction, specifically employing Reed-Solomon codes and Cross Interleaved Reed-Solomon Coding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If simple error correction (Hamming codes) is used in flash memory, then the device complexity is reduced and manufacturing cost is lowered, but the reliability and error correction capability are insufficient to handle high error rates in recycled or heavily used memory
Solution Approach 1:
The error correction functionality is segmented into two distinct parts: a hardware-based coding unit that performs encoding and error detection, and a software-based error correction unit that performs actual error correction. This segmentation allows the hardware to remain simple while enabling powerful software-based correction algorithms to handle high error rates in recycled flash memory.
Solution Approach 2:
The patent introduces an intermediary hardware coding unit that acts as a bridge between the simple flash memory and the complex error correction needs. This coding unit prepares data by adding redundancy bits in hardware, then passes it to software for sophisticated Reed-Solomon decoding, allowing complex error correction without making the flash memory itself complex.
2Reliability
If extended error correction algorithms (Reed-Solomon) are implemented in software only, then the error correction capability is improved, but the processing time and productivity are reduced due to the computational overhead
Solution Approach 1:
The error correction process is divided into two segments: hardware-based encoding and error detection (coding unit), and software-based error correction (error correction unit). This segmentation allows computationally intensive error correction algorithms to be implemented in software while keeping the hardware simple and fast for basic operations.
Solution Approach 2:
The hardware coding unit performs preliminary actions by pre-processing the data through encoding and error detection before passing it to the software error correction unit. This preliminary hardware processing reduces the computational burden on the software, improving overall processing efficiency while maintaining strong error correction capabilities.
3Reliability
If more sectors are allocated for error correction overhead, then the reliability and error correction capability are improved, but the available data storage capacity is reduced
Solution Approach 1:
The patent changes the parameter of error correction capability by implementing extended Reed-Solomon codes that can correct multiple errors per sector, rather than relying on increasing the number of correction sectors. This allows the same storage capacity to provide much stronger error correction, making recycled flash memory with high error rates usable without sacrificing data storage capacity.
4Reliability
If advanced error correction codes are implemented, then the reliability of recycled flash memory is improved, but the manufacturing cost and device complexity increase
Solution Approach 1:
The system uses the host processor's existing software capabilities to perform error correction, rather than requiring dedicated hardware circuits. This self-service approach leverages resources already present in the system, avoiding additional manufacturing costs while providing advanced error correction for recycled flash memory.
Solution Approach 2:
The patent replaces complex hardware-based error correction circuits with software-based error correction algorithms running on the host processor. This substitution eliminates the need for additional hardware components, reducing manufacturing cost while maintaining or improving error correction capability through flexible software implementation.
Data Source
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AI summary
A data processing device for applying an error correction algorithm to data written to and data read from a re-writable memory, the data processing device comprising a coding unit implemented in hardware, the coding unit being capable of performing a coding operation in which it receives a first set of data to be written to the memory, processes that data in accordance with the error correction algorithm to form a second set of data and outputs the second set of data for writing to the memory, and an error detection operation in which it receives data read from the memory and processes that data in accordance with the error correction algorithm to determine whether the read data contains an error and an error correction unit implemented in software, the error correction unit being arranged to receive read data that contains an error, process that data in accordance with the error correction algorithm to correct said error and thereby form corrected data, and output the corrected data.