Flash Memory Block Refresh Based on Deterioration and Read Frequency

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Solution Overview

Problem

The existing semiconductor storage apparatuses with flash memory face challenges in maintaining data reliability and extending storage lifetime due to varying degrees of deterioration across storage areas, which are not effectively addressed by current refresh methods that rely solely on read frequency, elapsed time, or production quality differences.

Innovation Solution

The apparatus divides storage areas into blocks, managing each block's deterioration and read frequency to calculate a specific reliability maintenance period, allowing for targeted and optimized refresh operations based on these factors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If refresh is executed frequently based on read frequency or elapsed time, then data reliability is maintained, but storage area lifetime is reduced due to unnecessary refresh operations

Engineering Contradiction:
Improvedata reliabilityVSAvoidstorage area lifetime
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent applies local quality by managing different storage areas (blocks) with different refresh policies based on their individual deterioration characteristics. Each block is assigned a specific reliability period calculated from its degree of deterioration and read frequency, allowing high-reliability blocks to be refreshed less frequently while low-reliability blocks receive more frequent refresh, optimizing both data reliability and storage lifetime at the block level

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the parameter of refresh timing from fixed (based solely on read frequency or elapsed time) to dynamic (based on calculated reliability period considering degree of deterioration). By calculating the reliability period for each block using its specific deterioration degree and read frequency, the system adapts refresh operations to actual storage conditions, preventing unnecessary refresh while maintaining data reliability

Inventive Principle:
Principle #35Parameter changes

2Ease of operation

If refresh is executed based on uniform criteria, then implementation is simple, but storage areas with different deterioration degrees cannot be optimally managed

Engineering Contradiction:
Improverefresh operation simplicityVSAvoiddata reliability for high deterioration blocks
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent segments the storage areas into multiple blocks and manages each block independently with its own reliability period calculation. This segmentation allows the system to account for variations in deterioration degree across different blocks, applying appropriate refresh timing to each based on its specific characteristics rather than using a uniform approach for all storage areas

Inventive Principle:
Principle #1Segmentation

3Duration of action of stationary object

If refresh is delayed to extend storage lifetime, then unnecessary refresh is prevented, but data reliability may degrade in high deterioration areas

Engineering Contradiction:
Improvestorage area lifetimeVSAvoiddata reliability
Core Design Contradiction:
Duration of action of stationary objectVSReliability

Solution Approach 1:

The patent performs preliminary action by calculating the reliability period for each block in advance, considering its degree of deterioration and read frequency. This pre-calculation allows the system to determine the optimal refresh timing before data reliability actually degrades, enabling proactive refresh scheduling that extends storage lifetime while maintaining data reliability for each specific block

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9129699B2Semiconductor storage apparatus and method including executing refresh in a flash memory based on a reliability period using degree of deterioration and read frequency
Publication Date: 2015.09.08 HITACHI VANTARA LTD
  • US9129699B2 patent drawing
  • US9129699B2 patent drawing
  • US9129699B2 patent drawing

AI summary

A semiconductor storage apparatus comprises a memory controller and flash memories which include a plurality of blocks as storage areas. The memory controller is configured to manage a degree of deterioration and read frequency for each of the plurality of blocks. A reliability maintained period is calculated for each storage area based on the degree of deterioration and read frequency for each storage area of a flash memory, and refresh is executed on each storage area in a planned manner based on the calculated reliability maintained period by newly storing the data stored in a block in another block based on an obtained reliability maintained period. The memory controller may also be configured to execute verification on each block and, if the number of failure bits is larger than a predetermined threshold, execute refresh to store data which is stored in a verification target block in another block.