Flash Memory Refresh Using Single Constant Gate Voltage
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Solution Overview
Problem
Existing flash memory technologies face challenges in maintaining data integrity due to gate disturbance issues and increased operation time caused by using two different control gate voltage levels for determining charge loss and gain bits, which affects reliability and data retention.
Innovation Solution
A method for refreshing flash memory cells using a single, constant control gate voltage, with an embedded algorithm to detect and address charge loss/gain bits during programming, erasing, reading, and power-on stages, thereby preventing gate disturbance and enhancing data retention and operation speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If two different control gate voltage levels are used to determine whether cells require refreshing, then data detection capability is improved, but operation time increases and gate disturbance issues occur
Solution Approach 1:
The patent changes the voltage parameter from two different levels to a single constant level. By using one control gate voltage level for all read operations, the system eliminates the time penalty associated with switching between voltage levels while maintaining the ability to detect charge loss and gain bits through the embedded algorithm that monitors threshold voltage shifts.
Solution Approach 2:
The single control gate voltage level performs multiple functions: it enables both initial data detection and refresh determination. The embedded algorithm uses this universal voltage level to detect charge loss bits, charge gain bits, and determine refresh requirements, eliminating the need for separate voltage levels for different detection purposes.
2Measurement precision
If two different control gate voltage levels are used to determine whether cells require refreshing, then data detection capability is improved, but gate disturbance issues and reliability decrease
Solution Approach 1:
The patent stabilizes the voltage parameter by using a single constant control gate voltage level throughout all operations. This eliminates the gate disturbance issues caused by switching between two different voltage levels, thereby improving reliability and data retention while maintaining detection capability through the embedded algorithm.
3Measurement precision
If two different control gate voltage levels are used, then charge loss and gain bit detection is enabled, but device complexity increases
Solution Approach 1:
The single control gate voltage level serves multiple detection purposes: it detects charge loss bits, charge gain bits, and determines refresh requirements. This universal approach simplifies the voltage management logic and reduces device complexity compared to managing two separate voltage levels for different detection functions.
Data Source
AI summary
A plurality of cells of a flash memory are tested to determine if they need to be refreshed. The cells are read and a plurality of different sensing ratios are used to determine if any of the cells need to be refreshed. Any cells that are determined to need refreshing are refreshed. The cells are read using only a single constant gate voltage.