Serial Flash Memory Reset via Command Sequence
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Solution Overview
Problem
Serial flash memory chips lack a reset pin, making it difficult to reset them externally without affecting other circuits sharing the same power source, leading to system control issues and re-initialization challenges.
Innovation Solution
The use of a write protect pin or hold pin to transmit a reset signal, or employing a clock pin and data input pin to generate a reset signal through a specified command sequence, allowing for reset operations without adding extra pins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a reset pin is added to the serial flash memory chip, then external reset control is enabled, but the pin count increases beyond the limited 8 pins
Solution Approach 1:
The patent makes existing pins (write protect pin or hold pin) perform multiple functions: their original function and reset signal transmission function. The selector circuit dynamically connects these pins to either their original function or the reset signal line based on a selecting signal, enabling one pin to serve multiple purposes without increasing pin count.
2Reliability
If power is cycled to reset the flash memory chip, then reset operation is achieved, but other circuits sharing the same power source are also reset causing system control issues
Solution Approach 1:
The patent extracts the reset function from the power cycling operation and creates an independent reset signal transmission path through existing pins. This allows the flash memory chip to be reset independently without affecting other circuits that share the same power source, separating the reset control from the power management.
3Device complexity
If existing pins are reused for reset signal transmission, then pin count is maintained, but pin function flexibility is reduced
Solution Approach 1:
The patent introduces a dynamic switching mechanism through the selector circuit and selecting signal. The function of existing pins is not fixed but can be dynamically changed between their original function and reset signal transmission function based on system needs, maintaining adaptability while reusing limited pins.
Data Source
AI summary
A flash memory apparatus with serial interface is disclosed. The flash memory apparatus includes a command receiver, a command decoder and a core circuit. The command receiver sequentially receives a plurality of command data through the data input pin and the clock pin. The command decoder receives a command sequence formed by the command data, and compares the command sequence with a reference sequence to generate a reset signal. The core circuit receives the reset signal to activate a reset operation according to the reset signal.