Flash Memory Retention Assessment Using Test Pattern Read Errors
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Solution Overview
Problem
Solid-state non-volatile memory devices face challenges in maintaining data integrity over time due to degradation factors like read disturb, write disturb, and temperature changes, especially when powered off, as existing proactive management is limited to operational hours and may not ensure data availability upon reactivation.
Innovation Solution
An evaluation circuit writes a test pattern to a control set of memory cells, periodically reads it, and determines the data retention time based on read errors, allowing for a data retention policy to be implemented and communicated to a host device for ensuring data integrity, even when the device is not powered.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing proactive management methods are used, then data integrity during operational hours is maintained, but data availability upon device reactivation after extended periods cannot be ensured
Solution Approach 1:
The patent applies preliminary action by performing data retention assessment and identifying blocks at risk of data loss before the device is reactivated after an extended period. The controller proactively evaluates retention characteristics and refreshes or migrates data from vulnerable blocks before they can cause data unavailability, thus ensuring data integrity is maintained even during non-operational periods.
2Reliability
If data is continuously monitored and refreshed, then data integrity is maintained, but device complexity and overhead operations increase
Solution Approach 1:
The patent implements self-service by enabling the memory controller to autonomously perform data retention assessment, identify blocks requiring attention, and execute refresh or migration operations without external intervention. The system monitors its own health status and takes corrective actions automatically, reducing the need for complex external management mechanisms while maintaining data integrity.
Solution Approach 2:
The patent applies parameter changes by dynamically adjusting data retention assessment intervals and refresh frequencies based on observed retention characteristics and environmental conditions. Rather than using fixed monitoring schedules, the system adapts its management parameters to actual device behavior, reducing unnecessary operations while maintaining reliability.
3Measurement precision
If read operations are performed frequently to monitor data integrity, then data retention assessment is improved, but read disturb effects increase
Solution Approach 1:
The patent applies partial action by performing retention assessment on a selective basis rather than continuously monitoring all blocks. The controller identifies and assesses only those blocks that are likely to exhibit retention issues based on previous performance, age, and environmental factors, thereby reducing the total number of read operations needed while maintaining adequate assessment accuracy.
Data Source
AI summary
Method and apparatus for managing data in a memory, such as a flash memory array. In accordance with some embodiments, a test pattern is written to a selected block of solid-state non-volatile memory cells. The test pattern is read from the selected block and a total number of read errors is identified. A data retention time is determined in response to the total number of read errors and an elapsed time interval between the writing of the test pattern and the reading of the test pattern. Data in a second block of the solid-state non-volatile memory cells are thereafter refreshed in relation to the determined data retention time.