3D Flash Memory Retention Management via Independent Refresh
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Solution Overview
Problem
Flash memory devices experience data retention issues due to charge loss in floating gates over time, leading to threshold voltage changes and error bits, which degrade read operation performance and require power to maintain data integrity.
Innovation Solution
A storage device with a retention management module that operates independently to refresh 3D flash memory using a separate processing core and power module, even when host power is not supplied, by selecting a minimum resource combination for low power consumption and periodic wake-ups to maintain data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the flash memory cell is not supplied with power for a long period of time, then power consumption is reduced, but charge loss occurs in the floating gate leading to threshold voltage changes and error bits
Solution Approach 1:
The retention management module performs preliminary refresh operations before charges are completely lost from the floating gate. By detecting threshold voltage changes and executing refresh operations in advance, the system prevents error bits from occurring while maintaining low power consumption during extended idle periods.
Solution Approach 2:
The system implements periodic wake-up intervals where the retention management module activates to perform refresh operations on the flash memory cell array. This periodic action maintains data integrity over long periods without continuous power supply, balancing energy savings with reliability requirements.
2Ease of operation
If a read operation is performed on flash memory cells with changed threshold voltages, then data can be read, but read operation performance deteriorates considerably due to error bits and excessive defensive code execution
Solution Approach 1:
The retention management module continuously monitors threshold voltage changes in the flash memory cell array and uses this feedback information to determine when refresh operations are needed. This feedback mechanism prevents error bits from accumulating to levels that would degrade read operation performance.
Solution Approach 2:
The retention management module autonomously manages the refresh operations without requiring host intervention. It self-monitors the health of the flash memory cell array and self-corrects threshold voltage drift, ensuring read operation performance is maintained without burdening the host system.
3Reliability
If the retention management module is always active to refresh flash memory, then data retention is improved, but power consumption increases
Solution Approach 1:
The retention management module dynamically adjusts its operation mode between active monitoring and low-power sleep states. It activates only when threshold voltage changes are detected or at predetermined wake-up intervals, rather than operating continuously, thus maintaining data retention while minimizing power consumption.
Solution Approach 2:
The system changes operational parameters by switching between different power states and refresh intervals based on the actual condition of the flash memory cell array. When data retention risk is low, the system operates in a lower power state; when risk increases, it activates refresh operations, optimizing the balance between reliability and energy usage.
Data Source
AI summary
A storage device and a refresh method thereof are provided. The storage device includes at least a first processing core configured to operate by receiving a first power from a host, a second processing core separate from the first processing core, at least a first three-dimensional (3D) flash memory, a power module and a retention management module supplied with a second power from the power module when the first power is not supplied from the host. The retention management module is configured to refresh a part of the first 3D flash memory using the second processing core. The retention management module is configured to be woken up at intervals of a first period to refresh the part of the first 3D flash memory.