Flash Memory Error Recovery via Pre-computed Retry Table

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Solution Overview

Problem

Flash memory systems face read errors due to frequent data access, leading to data corruption and performance degradation, as the charges in memory cells change, necessitating an effective error-recovery mechanism to enhance system performance.

Innovation Solution

A storage system and method utilizing a controller with a retry table that defines error type patterns, allowing the control circuit to test voltage shift values sequentially to determine the current error type and perform adjusted accessing actions, such as moving data to cache memory or other blocks, to recover from access errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the control circuit performs sequential testing of voltage shift values to determine error type, then the accuracy of error recovery is improved, but the time required for error recovery increases

Engineering Contradiction:
Improveerror recovery accuracyVSAvoiderror recovery time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The retry table is pre-populated with multiple error type patterns and their corresponding voltage shift values before actual data access operations. When a read error occurs, the control circuit can directly query the pre-computed retry table instead of performing sequential testing, significantly reducing error recovery time while maintaining high accuracy through the comprehensive error patterns stored in advance

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system dynamically adjusts the error recovery strategy based on the specific error type detected. Instead of always performing full sequential testing, the control circuit uses the retry table to identify the error type pattern and applies only the necessary voltage shift adjustments, making the recovery process adaptive and efficient rather than static and exhaustive

Inventive Principle:
Principle #15Dynamics

2Reliability

If the control circuit performs comprehensive testing to identify all error types, then the completeness of error detection is improved, but the complexity of the control circuit increases

Engineering Contradiction:
Improveerror detection completenessVSAvoidcontrol circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The error detection process is segmented into two independent parts: (1) a comprehensive but simple retry table that contains all possible error type patterns and voltage shift values, and (2) a simplified control circuit that only needs to query and apply the appropriate entry from the retry table. This segmentation allows complete error detection coverage while keeping the control circuit complexity low

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The retry table acts as an intermediary data structure that stores the complex error type patterns and voltage shift mappings. The control circuit interacts with this intermediary rather than directly implementing complex testing logic, which simplifies the control circuit design while maintaining comprehensive error detection capabilities through the pre-stored patterns

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10628247B2Flash memory testing according to error type pattern
Publication Date: 2020.04.21 SOLID STATE STORAGE TECH CORP
  • US10628247B2 patent drawing
  • US10628247B2 patent drawing
  • US10628247B2 patent drawing

AI summary

A storage method comprises storing a retry table; wherein the retry table recites a plurality of error type patterns, the error type patterns comprises a plurality of default error types; accessing data stored in the flash memory; wherein an access error caused when a control circuit reads the data, the control circuit reads the retry table and performs testing according to the error type patterns sequentially to determine a current error type of the access error, and the control circuit performs an adjusted accessing action according to the current error type.