Flash Memory Control Chip Root Table Pointer

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Flash memory systems face inefficiencies in restoring the logical-to-physical address mapping relationship during power failures, requiring extensive scanning of the entire memory to rebuild the correct mapping, which is time-consuming and unreliable.

Innovation Solution

A flash memory control chip with a microcontroller and dual non-volatile storage areas (NVM1 and NVM2) that stores a root table and its pointer, allowing quick retrieval of the logical-to-physical address mapping relationship using error correction codes, ensuring rapid and accurate rebuilding of the mapping upon power restoration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the entire flash memory is scanned to restore the logical-to-physical address mapping relationship after power failure, then the correct mapping can be recovered, but the restoration time is excessively long

Engineering Contradiction:
Improvecorrectness of address mapping restorationVSAvoidrestoration time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-storing the root table pointer in a non-volatile storage area before power failure occurs. This pointer directly indicates the location of the root table in flash memory, enabling immediate retrieval of the address mapping relationship without scanning. The system performs the critical action of preserving location information in advance, so when power is restored, the microcontroller can directly access the mapping data through the stored pointer, dramatically reducing restoration time while ensuring correctness.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If the logical-to-physical address mapping relationship is updated in flash memory during normal operation, then data can be stored, but the mapping may become unreliable if power fails during the update process

Engineering Contradiction:
Improvedata storage capabilityVSAvoidintegrity of address mapping
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements beforehand cushioning by maintaining a root table pointer in a non-volatile storage area that serves as a backup reference. During normal operation, when the address mapping is updated in flash memory, the root table pointer remains intact in the non-volatile storage, providing a cushioning safeguard. If power fails during the update process, this pre-stored pointer ensures that the system can still reliably locate and restore the correct address mapping relationship, preventing corruption that would otherwise occur during incomplete updates.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Loss of time

If a root table pointer is stored in non-volatile storage area to enable quick retrieval, then restoration speed improves, but the device complexity increases

Engineering Contradiction:
Improverestoration timeVSAvoidstorage structure complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent applies the taking out principle by extracting only the critical location information (root table pointer) from the complex address mapping structure and storing it separately in a non-volatile storage area. Instead of storing or scanning the entire address mapping relationship, the system extracts just the essential pointer data that indicates where the mapping is located. This extraction dramatically simplifies the restoration process while maintaining full functionality, as the microcontroller only needs to retrieve and follow this single pointer to access the complete mapping relationship.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS9465538B2Flash memory control chip and data storage device and flash memory control method
Publication Date: 2016.10.11 VIA TECH INC
  • US9465538B2 patent drawing
  • US9465538B2 patent drawing
  • US9465538B2 patent drawing

AI summary

A flash memory control method, storing a logical-to-physical address mapping relationship between a host and a flash memory and a root table in the flash memory and providing a non-volatile storage area storing a root table pointer. A mapping relationship pointer is set forth in the root table to show where the logical-to-physical address mapping relationship is stored in the flash memory. The root table pointer points to the root table stored in the flash memory. In response to a power restoration request issued from the host, the flash memory is accessed based on the root table pointer and thereby the root table is read and the logical-to-physical address mapping relationship is retrieved from the flash memory based on the mapping relationship pointer set forth in the root table.